Mantej Singh Sahota

Mantej Singh Sahota

Highly skilled Component Design Engineer with over 13 years of experience in the semiconductor industry, specializing in verification,... | Folsom, California, United States

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Work Experience

Intel

IP Design Verification Engineer

Wed Mar 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Intel

Component Design Engineer

Sun Nov 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

Microchip Technology

Design Engineer II

Tue Mar 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Oct 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

Broadcom

ASIC Verification and Validation Intern (Emulex Corporation )

Thu Oct 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Feb 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

Skills

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