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- VHDL/Verilog/System Verilog RTL Design Static Timing and Synthesis. DFT: BIST & ATPG SOCs & Mixed signal integration Serial IO PCS and PMA layer Specialties: VHDL/Verilog ASIC Design. Synthesis, STA, and ATPG. SOC top level chip design and integration.
- Hardware Design Engineer at Esperanto Technologies, Inc.
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FAQ About Richard Steeves
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Richard Steeves is located at 7408 Southwest Cedarcrest Street, Portland, United States
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Richard Steeves is a VHDL/Verilog/System Verilog RTL Design Static Timing and Synthesis. DFT: BIST & ATPG SOCs & Mixed signal integration Serial IO PCS and PMA layer Specialties: VHDL/Verilog ASIC Design. Synthesis, STA, and ATPG. SOC top level chip design and integration. Esperanto Technologies
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Richard Steeves currently works in the Esperanto Technologies
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Richard Steeves specializes in VHDL/Verilog/System Verilog RTL Design Static Timing and Synthesis. DFT: BIST & ATPG SOCs & Mixed signal integration Serial IO PCS and PMA layer Specialties: VHDL/Verilog ASIC Design. Synthesis, STA, and ATPG. SOC top level chip design and integration.
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Richard Steeves speaks the following languages: No languages available.
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Richard Steeves has prior experience in the following industries: Rohde And Schwarz , Synopsys , Rim Semiconductor , Pmc Sierra , Pmc Sierra , Nortel
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Richard Steeves has the following professional experience: Esperanto Technologies , Rohde And Schwarz , Rohde And Schwarz , Synopsys , Rim Semiconductor , Pmc Sierra , Pmc Sierra , Nortel .
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You can view Richard Steeves’s LinkedIn profile at LinkedIn URL.
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Richard Steeves’s work email addresses are [email protected] .
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Richard Steeves works at Esperanto Technologies