
Abhishekkumar Thakur
Atomic layer processes, for example, atomic layer deposition (ALD) and atomic layer etching (ALE) have always fascinated me... | Großkrotzenburg, Hesse, Germany
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Abhishekkumar Thakur’s Location Großkrotzenburg, Hesse, Germany
Abhishekkumar Thakur’s Expertise Atomic layer processes, for example, atomic layer deposition (ALD) and atomic layer etching (ALE) have always fascinated me by their inherent angström level deposition/etch precision. The cyclic growth of material with exceptional conformality based on sequential, self-limiting surface half-reactions has fostered the adoption of ALD as an indispensable process step in the current FinFET (3D transistors) production line at the leading edge foundries. Apart from spacer based self-aligned multiple patterning (SAxP) in the front-end-of-line and Cu diffusion barrier film stack in the back-end-of-line interconnect technology in logic and memory applications, ALD has been adopted in HVM in many industries: for example, moisture permeation barrier in organic ligh-emitting displays (OLEDs), thin-film batteries, photovoltaics (PERC solar cells), ferrolectric memory devices, corrosion resistant coatings on implant devices in medical and healthcare, particle coatings in drug delivery, wear resistant part-coatings, decorative coatings, powder coatings in ceramic industry etc. While ALD debuted in high volume manufacturing (HVM) at 90nm DRAM node for the high-k capacitor dielectric (Samsung in 2004) and at 45nm node in deposition of high-k dielectric (HfO2) for gate stack (Intel in 2007), ALE is in focus as the next generations etch technology beyond 16/14nm nodes. ALE enables material removal to form sub 20 Å wide trenches, fins in FinFET transistor architecture or nanowires/nanosheets in gate-all-around (GAA) transistor architecture without damaging other parts of the nanostructure. The semiconductor industry is, therefore, pushing for a joint ALD and ALE processing technology that could be an indispensable process combination for SAxP (or the so-called pitch splitting).
Abhishekkumar Thakur’s Current Industry Buhler
Abhishekkumar
Thakur’s Prior Industry
Hitachi Hi Rel Power Electronics
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Technische Universitat Dresden
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Clean Room Institute Fur Halbleiter Und Mikrosystemtechnik Tu Dresden
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Fraunhofer Institute For Ceramic Technologies And Systems Ikts
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Plasway
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Buhler
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Work Experience

Buhler
R&D Process Engineer, Optics
Wed Jun 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Plasway
R&D Engineer ― Atomic Layer Processes and Equipments
Wed May 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jul 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Fraunhofer Institute For Ceramic Technologies And Systems Ikts
Master Thesis Student and Student Research Assistant
Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Mar 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Technische Universitat Dresden
Academic Research Project Student
Sun Oct 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Clean Room Institute Fur Halbleiter Und Mikrosystemtechnik Tu Dresden
Student Research Assistant
Tue Nov 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jul 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Technische Universitat Dresden
Student
Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Hitachi Hi Rel Power Electronics
Quality Assurance Engineer
Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Aug 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)