
Adam Czubkowski
Experienced electronic design engineer, passionate about high technologies and academia-industry cooperation Skills: digital design, logic synthesis, static timing analysis,... | Gdansk, Gdansk, Poland
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Adam Czubkowski’s Emails ad****@in****.com
Adam Czubkowski’s Phone Numbers No phone number available.
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Adam Czubkowski’s Location Gdansk, Gdansk, Poland
Adam Czubkowski’s Expertise Experienced electronic design engineer, passionate about high technologies and academia-industry cooperation Skills: digital design, logic synthesis, static timing analysis, mixed signal verification, digital filter design, technical writing, mentorship of junior engineers and student co-ops Technologies: digital audio, digital video, asynchronous design, digital signal processing, ASIC, FPGA, CPU, embedded system, desktop virtualization, mobile handset, mobile telephony base station, DC-DC converter, SENT protocol, I2C interface, I2S interface, automotive pressure sensing, discrete time PID control
Adam Czubkowski’s Current Industry Intel
Adam
Czubkowski’s Prior Industry
Analog Devices
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Mediatek
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Chip Sensors
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Cloudium Systems
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Intel
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Zmdi
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Altera
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Work Experience

Intel
Fpga Design Applications Engineer, Dsp, Video And Image Processing
Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
Senior Staff Electronic Design Engineer
Sun Apr 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Staff Electronic Design Engineer
Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Altera
Staff Electronic Design Engineer
Sat Aug 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Zmdi
Digital Integrated Circuit Design Engineer
Sun Jul 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jul 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Technical Writing Contractor
Thu Mar 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Cloudium Systems
Senior Fpga/Asic Design Engineer
Sat May 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Oct 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)
Chip Sensors
Design Engineering Contractor
Sun Nov 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Mar 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Mediatek
Senior Design Engineer
Tue Jan 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Oct 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)
Analog Devices
Senior Design Engineer
Sat Jan 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Dec 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)
Analog Devices
System Applications Engineer
Tue Jun 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Dec 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Analog Devices
Graduate/Project Design Engineer
Mon Oct 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat May 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Analog Devices
Summer Student Inter
Tue Aug 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)