Amit Kumar
My specialties includes the functional verification of chip design, abilities to understand the design quickly and quick learning... | Bengaluru, Karnataka, India
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Amit Kumar’s Location Bengaluru, Karnataka, India
Amit Kumar’s Expertise My specialties includes the functional verification of chip design, abilities to understand the design quickly and quick learning the new skills. I have 10+ years of experience in the field of IP and System on Chip verification. So far I have Verilog, System Verilog, Universal Verification Methodologies, Python, Perl under my belt. I have also worked extensively in PHYs Verification, Power Management ICs ( JEDEC std. PMIC 5000), PCIE protocol, PAM4 Ser-Des, Analog model verification, Gate level simulations. Extensively worked with globally distributed team and handled the responsibilities very well. I have also got the chance of leading verification for around 15+ successful taped out projects. I also worked on block level verification of Phase locked loop , Continuous Time Linear Equalizer , Decision Feedback Equalizer. I have experience of verifying many adaptive algorithms and calibration for PHYs up to 112Gbps. I have also experience on firmware verification, SV-DPI implementation, Micro-controller based simulation verification. My expertise on protocol categories includes the PCIE Gen1-5, CXL 2.0 , SATA , I2C, I3C, AHB, APB, AXI. I also developed the automation tools for verification testbench auto-generation using the specification using the Python for the intelligent approach for verifying the chip. I have also experience of verifying system-on-chip with ARM-cortex processor. Previously I also worked on visual basic coding embedded with excel to automate the register flow generation. Also having experience with Register-description Language (RDL) and Blueprint.
Amit Kumar’s Current Industry Quest Global
Amit
Kumar’s Prior Industry
Gennum
|
Semtech
|
Rambus
|
Quest Global
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Work Experience
Quest Global
Technical Manager
Sun Oct 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Rambus
Lead Member Of Technical Staff
Mon Feb 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Rambus
Senior Member of Technical Staff II at Rambus
Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Rambus
Senior Member of Technical Staff
Mon Aug 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Feb 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Semtech
ASIC Verification Engineer level 2
Fri Aug 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jul 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Semtech
ASIC Verification Engineer level 1
Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Gennum
ASIC Trainee Engineer
Wed Jun 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Amit Kumar Email Addresses
FAQ About Amit Kumar
-
Amit Kumar is located at
Bengaluru, Karnataka, India -
Amit Kumar is a
My specialties includes the functional verification of chip design, abilities to understand the design quickly and quick learning the new skills. I have 10+ years of experience in the field of IP and System on Chip verification. So far I have Verilog, System Verilog, Universal Verification Methodologies, Python, Perl under my belt. I have also worked extensively in PHYs Verification, Power Management ICs ( JEDEC std. PMIC 5000), PCIE protocol, PAM4 Ser-Des, Analog model verification, Gate level simulations. Extensively worked with globally distributed team and handled the responsibilities very well. I have also got the chance of leading verification for around 15+ successful taped out projects. I also worked on block level verification of Phase locked loop , Continuous Time Linear Equalizer , Decision Feedback Equalizer. I have experience of verifying many adaptive algorithms and calibration for PHYs up to 112Gbps. I have also experience on firmware verification, SV-DPI implementation, Micro-controller based simulation verification. My expertise on protocol categories includes the PCIE Gen1-5, CXL 2.0 , SATA , I2C, I3C, AHB, APB, AXI. I also developed the automation tools for verification testbench auto-generation using the specification using the Python for the intelligent approach for verifying the chip. I have also experience of verifying system-on-chip with ARM-cortex processor. Previously I also worked on visual basic coding embedded with excel to automate the register flow generation. Also having experience with Register-description Language (RDL) and Blueprint. Quest Global -
Amit Kumar currently works in the
Quest Global -
Amit Kumar specializes in
My specialties includes the functional verification of chip design, abilities to understand the design quickly and quick learning the new skills. I have 10+ years of experience in the field of IP and System on Chip verification. So far I have Verilog, System Verilog, Universal Verification Methodologies, Python, Perl under my belt. I have also worked extensively in PHYs Verification, Power Management ICs ( JEDEC std. PMIC 5000), PCIE protocol, PAM4 Ser-Des, Analog model verification, Gate level simulations. Extensively worked with globally distributed team and handled the responsibilities very well. I have also got the chance of leading verification for around 15+ successful taped out projects. I also worked on block level verification of Phase locked loop , Continuous Time Linear Equalizer , Decision Feedback Equalizer. I have experience of verifying many adaptive algorithms and calibration for PHYs up to 112Gbps. I have also experience on firmware verification, SV-DPI implementation, Micro-controller based simulation verification. My expertise on protocol categories includes the PCIE Gen1-5, CXL 2.0 , SATA , I2C, I3C, AHB, APB, AXI. I also developed the automation tools for verification testbench auto-generation using the specification using the Python for the intelligent approach for verifying the chip. I have also experience of verifying system-on-chip with ARM-cortex processor. Previously I also worked on visual basic coding embedded with excel to automate the register flow generation. Also having experience with Register-description Language (RDL) and Blueprint. -
Amit Kumar speaks the following languages:
No languages available. -
Amit Kumar has prior experience in the following industries:
Rambus , Rambus , Rambus , Semtech , Semtech , Gennum -
Amit Kumar has the following professional experience:
Quest Global , Rambus , Rambus , Rambus , Semtech , Semtech , Gennum . -
You can view Amit Kumar’s
LinkedIn profile at LinkedIn URL. -
Amit Kumar’s work email addresses are
[email protected] . -
Amit Kumar works at
Quest Global
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