
Amr Eldieb
Obtained BSc. Degree from faculty of engineering, Ain Shams University on 2002. Worked as Research and Development Engineer... | Solihull, England, United Kingdom
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Amr Eldieb’s Emails am****@si****.com
Amr Eldieb’s Phone Numbers No phone number available.
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Amr Eldieb’s Location Solihull, England, United Kingdom
Amr Eldieb’s Expertise Obtained BSc. Degree from faculty of engineering, Ain Shams University on 2002. Worked as Research and Development Engineer for ICT on FPGA kits development and FPGA, VHDL training. On 2004 joined SyMMiD Corporation “A fabless design house based in Malaysia” working as Hardware design Engineer, working on FPGA kits development, FPGA consultant and Authorized Xilinx trainer for FPGA and VHDL courses. On 2006 joined ACCM R&D center, in which participated in the development of AMD Socket2 based desktop motherboard. The motherboard design won the 20th annual PCB Technology Leadership Award Program TLA held by Mentor Graphics in the category of PC Computers and Peripherals. On 2007 joined Mentor Graphics IP division working in storage devices IPs development and participated in Plugfest event held on November 2007 with Mentor SATA 2.6 IP. A demo based on Xilinx FPGA and PPC processor passed interoperability tests against different HDD and ODD vendors such as Toshiba, Sony, Hitachi and Samsung. On 2008 joined Mentor Graphics Emulation division working as Senior VLSI design engineer developing MED iSolve Hardware solutions. During this period Amr worked on the development of iUSB, iSATA and leading the activity of iPCIe 2.0 and iPCIe 3.0 solutions. On December 2012 Amr joined Silicon Vision as Digital Team Lead participating in the design of RF and SERDES solutions provided by the company.
Amr Eldieb’s Current Industry Siemens Eda
Amr
Eldieb’s Prior Industry
Ict
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Symmid
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Accm
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Mentor Graphics
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Silicon Vision
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Si Ware Systems
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Intel
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Siemens Eda
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Work Experience

Siemens Eda
Emulation Specialist
Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
Pre-Si Valid/Verif Engineer
Mon May 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat May 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Si Ware Systems
Hardware System Design leader
Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon May 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Silicon Vision
Digital Team Lead
Sat Dec 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Mar 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Mentor Graphics
Technical Lead
Mon Oct 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Dec 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Mentor Graphics
Sr. VLSI Design Engineer
Sat Nov 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Sep 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Mentor Graphics
Software Engineer
Tue Apr 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Nov 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)
Mentor Graphics
Hardware Design Engineer
Thu Mar 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Mar 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)
Accm
Hardware Design Engineer
Wed Feb 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)
Symmid
Hardware Design Engineer
Wed Dec 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)
Ict
Hardware Design Engineer
Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)