Anand Rk

Anand Rk

Experienced Design Engineering Director with a demonstrated experience of working in the Semi Conductor industry. Skilled in silicon... | San Jose, California, United States

*50 free lookup(s) per month.

No credit card required.

Anand Rk’s Emails

Anand Rk’s Phone Numbers

Social Media

Anand Rk’s Location

Anand Rk’s Expertise

Anand Rk’s Current Industry

Anand Rk’s Prior Industry

Not the Anand Rk you were looking for?

Find accurate emails & phone numbers for over 700M professionals.

Work Experience

Cadence Design Systems

Design Engineering Director

Sat Jul 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Cadence Design Systems

Sr Design Engineering Manager

Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jul 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)

Cadence Design Systems

Design Engineering Manager

Thu Oct 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)

Cadence Design Systems

Principal Design Engineer

Sat Jul 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Oct 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)

Cadence Design Systems

Lead Design Engineer

Wed Jul 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jun 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

Cadence Design Systems

Design Engineer II

Wed May 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

Cosmic Circuits

Design Engineer

Tue Mar 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Apr 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Deloitte

Business Analyst

Tue Jun 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

Skills

Languages

No languages available.