
Arun Barman
Total 15 years of strong technical experience and Leading of team in technical aspect Paper/ Publication/ Patents: • Papers on... | Noida, Uttar Pradesh, India
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Arun Barman’s Emails ar****@nx****.com
Arun Barman’s Phone Numbers 1408434****
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Arun Barman’s Location Noida, Uttar Pradesh, India
Arun Barman’s Expertise Total 15 years of strong technical experience and Leading of team in technical aspect Paper/ Publication/ Patents: • Papers on EDN on Mix signal IP integration challange • Defensive publication on SAR-Algorithm implementation • Patent filed on USPTO Specialization: * Expertise in complex IP/Subsystem design * Mentoring and managing development team * Road map and competitive analysis * Organization-wide Standard interface / process definition * Collaboration with multi-site teams o Planning & Assigning of work o Training/grooming of juniors o Handling customer and SOC issues o Analysis of specification/requirements & planning o Development of macro and micro architecture o RTL Coding in Verilog, VHDL and SV o Analysis of Performance o Defining test scenarios & planning for verification/coverage o Testing of Lint, CDC o Synthesis, DFT and LEC o Customer documentation o Automation in IP development * Development for FPGA o Development of embedded system on FPGA platform o Driver, tester development o Validation * Experience in Board design o Device/interconnect selection & Schematics development o Logic development in PLD / FPGA o Managing PCB layout activity o Debugging system integration issues & solutions * Knowledge in C, C++ programming, scripting Perl, Shell programming.
Arun Barman’s Current Industry Nxp Semiconductors
Arun
Barman’s Prior Industry
Nxp Semiconductors
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Centre For Development Of Telematics
|
Transwitch
|
Transwitch New Delhi
|
Freescale Semiconductor
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Work Experience

Nxp Semiconductors
Senior Principal Design Engineer
Thu Apr 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Freescale Semiconductor
Staff Design Engineer
Wed Oct 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Mar 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Freescale Semiconductor
Lead Design Engineer
Sat May 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Sep 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Transwitch
Pmts
Tue Sep 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Apr 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Transwitch New Delhi
Smts
Sun Jan 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Aug 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)
Transwitch
Mts
Sun Feb 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time)
Centre For Development Of Telematics
Research Engineer
Sun Oct 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Centre For Development Of Telematics
Graduate Engineer Trainee
Sun Aug 01 1999 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)
Nxp Semiconductors
Senior Principal Design Engineer
— Present