
Bhavadip Solanki
Seasoned NAND expert and system designer, offering a comprehensive background in multiple generations of NVME SSDs. Recognized for... | Bengaluru, Karnataka, India
*50 free lookup(s) per month.
No credit card required.
Bhavadip Solanki’s Emails bh****@sa****.com
Bhavadip Solanki’s Phone Numbers 91782900****
Social Media
Bhavadip Solanki’s Location Bengaluru, Karnataka, India
Bhavadip Solanki’s Expertise Seasoned NAND expert and system designer, offering a comprehensive background in multiple generations of NVME SSDs. Recognized for mentoring teams to achieve exceptional product designs and for my adept problem-solving and debugging skills. With 11 years of hands-on experience, I bring a profound understanding of NAND technology coupled with a collaborative approach, enhancing cross team coordination for seamless system integration.
Bhavadip Solanki’s Current Industry Samsung R And D Institute
Bhavadip
Solanki’s Prior Industry
Einfochips
|
Indian Institute Of Technology Kharagpur
|
Western Digital
|
Samsung R And D Institute
Not the Bhavadip Solanki you were looking for?
Find accurate emails & phone numbers for over 700M professionals.
Work Experience

Samsung R And D Institute
Senior Staff Firmware Engineer
Fri Dec 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Western Digital
Technologist - System Design Engineering
Fri Jul 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Dec 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Western Digital
Principal System Design Engineer
Sun Mar 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jun 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Western Digital
Staff System Design Engineer
Fri Feb 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Feb 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)
Western Digital
Staff Application Engineer
Wed Mar 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Western Digital
Staff Design & Verification Engineer
Sun Jan 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Western Digital
Senior Design Engineer
Sun Mar 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Western Digital
Design Engineer II
Sun Jul 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Mar 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Indian Institute Of Technology Kharagpur
M. Tech. in Visual Information & Embedded system
Tue Jun 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Einfochips
ASIC-Trainee
Mon Dec 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri May 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)