Chakaravarty Rajagopal

FAQ About Chakaravarty Rajagopal

• What is Chakaravarty Rajagopal's address?

  Chakaravarty Rajagopal is located at
  Folsom, California, United States

• What is Chakaravarty Rajagopal's job title?

  Chakaravarty Rajagopal is a
  Dynamic, analytical, and versatile Program Manager/IC Design Engineer with extensive semiconductor experience and comprehensive knowledge of ASIC and full custom RTL2GDS design flow. Exceptional leadership and project management skills, with demonstrated ability to plan and execute complex programs, collaborate with cross-functional teams, and lead and mentor staff. Expertise in RTL design codes using VHDL, Verilog and System Verilog HDLs, simulation, design testing, and verification applying industry standard OVM and UVM methodologies. Proficient in Place and Route flow encompassing synthesis, static timing analysis, clock tree synthesis, cross-domain clocking, lint, formal equivalent verification. Accomplished in analog and mixed-signal cell designs, creation of standard cell library. Comprehensive insight into deep submicron CMOS design technology. Skilled in diverse tools including VCS, Verdi, Modelsim, Design Compiler, Primetime, Silicon Smart, Scarlett, and Virtuoso ADE. Skillful in Python, PERL, TCL, and Shell scripting. Excellent Program Manager skills and acumen in leading PDK deliveries and developing strong customer relationships. Intel

• What industry does Chakaravarty Rajagopal currently work in?

  Chakaravarty Rajagopal currently works in the
  Intel

• What is Chakaravarty Rajagopal's area of expertise?

  Chakaravarty Rajagopal specializes in
  Dynamic, analytical, and versatile Program Manager/IC Design Engineer with extensive semiconductor experience and comprehensive knowledge of ASIC and full custom RTL2GDS design flow. Exceptional leadership and project management skills, with demonstrated ability to plan and execute complex programs, collaborate with cross-functional teams, and lead and mentor staff. Expertise in RTL design codes using VHDL, Verilog and System Verilog HDLs, simulation, design testing, and verification applying industry standard OVM and UVM methodologies. Proficient in Place and Route flow encompassing synthesis, static timing analysis, clock tree synthesis, cross-domain clocking, lint, formal equivalent verification. Accomplished in analog and mixed-signal cell designs, creation of standard cell library. Comprehensive insight into deep submicron CMOS design technology. Skilled in diverse tools including VCS, Verdi, Modelsim, Design Compiler, Primetime, Silicon Smart, Scarlett, and Virtuoso ADE. Skillful in Python, PERL, TCL, and Shell scripting. Excellent Program Manager skills and acumen in leading PDK deliveries and developing strong customer relationships.

• Which languages does Chakaravarty Rajagopal speak? 

  Chakaravarty Rajagopal speaks the following languages:
  No languages available.

• Which industries has Chakaravarty Rajagopal previously worked in?   

  Chakaravarty Rajagopal has prior experience in the following industries:
  No prior industries available.

• What is Chakaravarty Rajagopal’s work experience?  

  Chakaravarty Rajagopal has the following professional experience:
  Intel , Intel .

• How can I find Chakaravarty Rajagopal on LinkedIn?  

  You can view Chakaravarty Rajagopal’s
  LinkedIn profile at LinkedIn URL.

• What are Chakaravarty Rajagopal’s work email addresses?  

  Chakaravarty Rajagopal’s work email addresses are
  [email protected] .

• What company does Chakaravarty Rajagopal work for?  

  Chakaravarty Rajagopal works at
  Intel