Chengjie Jiang
- Bachelor’s degree in software/hardware engineering from the University of Toronto - 5 years of professional work experience in... | Toronto, Toronto, Canada
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Chengjie Jiang’s Emails ch****@nv****.com
Chengjie Jiang’s Phone Numbers No phone number available.
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Chengjie Jiang’s Location Toronto, Toronto, Canada
Chengjie Jiang’s Expertise - Bachelor’s degree in software/hardware engineering from the University of Toronto - 5 years of professional work experience in ASIC design/verification - Video CODEC IP - Excellent understanding of UVM constraint-random coverage-driven verification methodology - Experienced with writing System Verilog UVM test bench from scratch, functional and code coverage closure - Good knowledge of VCS Formal tools - Skilled C++ programmer with OOP & STD libs - C++ hardware golden reference modeling skills - In-depth hands-on experience with SystemC, UVM SystemC, and HLS design verification setup - Verilog hardware design skills, with a good understanding of PIPELINE design - Scripting skills with Python - Self-driven, fast adaptation to new environments
Chengjie Jiang’s Current Industry Nvidia
Chengjie
Jiang’s Prior Industry
Amd
|
Nvidia
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Work Experience
Nvidia
Senior Verification Engineer
Sun May 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Amd
Senior Asic Design/Verification Engineer
Sat Sep 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun May 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Amd
Fulltime Intern
Sun May 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Chengjie Jiang Email Addresses
FAQ About Chengjie Jiang
-
Chengjie Jiang is located at
Toronto, Toronto, Canada -
Chengjie Jiang is a
- Bachelor’s degree in software/hardware engineering from the University of Toronto - 5 years of professional work experience in ASIC design/verification - Video CODEC IP - Excellent understanding of UVM constraint-random coverage-driven verification methodology - Experienced with writing System Verilog UVM test bench from scratch, functional and code coverage closure - Good knowledge of VCS Formal tools - Skilled C++ programmer with OOP & STD libs - C++ hardware golden reference modeling skills - In-depth hands-on experience with SystemC, UVM SystemC, and HLS design verification setup - Verilog hardware design skills, with a good understanding of PIPELINE design - Scripting skills with Python - Self-driven, fast adaptation to new environments Nvidia -
Chengjie Jiang currently works in the
Nvidia -
Chengjie Jiang specializes in
- Bachelor’s degree in software/hardware engineering from the University of Toronto - 5 years of professional work experience in ASIC design/verification - Video CODEC IP - Excellent understanding of UVM constraint-random coverage-driven verification methodology - Experienced with writing System Verilog UVM test bench from scratch, functional and code coverage closure - Good knowledge of VCS Formal tools - Skilled C++ programmer with OOP & STD libs - C++ hardware golden reference modeling skills - In-depth hands-on experience with SystemC, UVM SystemC, and HLS design verification setup - Verilog hardware design skills, with a good understanding of PIPELINE design - Scripting skills with Python - Self-driven, fast adaptation to new environments -
Chengjie Jiang speaks the following languages:
No languages available. -
Chengjie Jiang has prior experience in the following industries:
Amd , Amd -
Chengjie Jiang has the following professional experience:
Nvidia , Amd , Amd . -
You can view Chengjie Jiang’s
LinkedIn profile at LinkedIn URL. -
Chengjie Jiang’s work email addresses are
[email protected] . -
Chengjie Jiang works at
Nvidia
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