
Deepa Chikkamath
I have total 13 years of experience in ASIC and FPGA design.I am working with Intel as... | Bengaluru, Karnataka, India
*50 free lookup(s) per month.
No credit card required.
Deepa Chikkamath’s Emails de****@in****.com
Deepa Chikkamath’s Phone Numbers No phone number available.
Social Media
Deepa Chikkamath’s Location Bengaluru, Karnataka, India
Deepa Chikkamath’s Expertise I have total 13 years of experience in ASIC and FPGA design.I am working with Intel as a lead.I am working on various Tool Flow Methodologies such as Lint,CDC,spyglassLP,synthesis etc. I worked as a Sr.FPGA design engineer in CEM solutions for 2 years.And in Tech Mahindra for 3.3 years as a Sr.Product engineer.I have specialized in FPGA design,RTL design,gate level simulation,synthesis and on board verification. I have worked on DSPs, and integrated protocols like PCIe,SPI,UART,Ethernet,AXI IPs and memory controller.I have experience in static timing analysis,CDC.
Deepa Chikkamath’s Current Industry Intel
Deepa
Chikkamath’s Prior Industry
Tech Mahindra
|
Cem Solutions
|
Eximius Design
|
Intel
Not the Deepa Chikkamath you were looking for?
Find accurate emails & phone numbers for over 700M professionals.
Work Experience

Intel
Logic design methodology engineer
Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
SOC design engineer
Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Eximius Design
Senior Engineer I
Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Cem Solutions
Sr.FPGA design engineer
Tue Apr 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Tech Mahindra
Sr.Product Engineer
Fri Oct 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Apr 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)