
Devin Ridge
Senior System Design Engineer with experience developing Verilog and VHDL based systems from specification, through RTL coding, system... | Roanoke, Virginia, United States
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Devin Ridge’s Emails de****@vt****.edu
Devin Ridge’s Phone Numbers 1410303****
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Devin Ridge’s Location Roanoke, Virginia, United States
Devin Ridge’s Expertise Senior System Design Engineer with experience developing Verilog and VHDL based systems from specification, through RTL coding, system simulation/verification, and synthesis. Specialties: Programming Languages: Verilog, VHDL, UNIX shell scripting Tools: ModelSim, Synplicity Synplify, Altera Quartus, Xilinx ISE, Xilinx EDK, Orcad, Altium, Synopsys VCS, VirSim, Design Compiler, Primetime, Mentor Seamless, Emacs
Devin Ridge’s Current Industry Virginia Tech
Devin
Ridge’s Prior Industry
Nortel
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Intel
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Ericsson
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Bops
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Protean Devices
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Signalscape
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Booz Allen Hamilton
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Ball Aerospace
|
Virginia Tech
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Work Experience

Virginia Tech
Faculty Research Associate
Sun Oct 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Ball Aerospace
Senior Electrical Engineer
Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Booz Allen Hamilton
Senior Electrical Engineer, Senior Lead Technologist
Tue Sep 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Signalscape
Senior Design Engineer
Wed May 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Sep 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)
Protean Devices
ASIC Design Engineer
Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed May 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)
Bops
ASIC Design Engineer
Thu Jun 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)
Ericsson
ASIC Design Engineer
Mon Sep 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jun 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
ASIC Design Engineer
Sat Jun 01 1996 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Sep 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time)
Nortel
Co-op, Custom Integrated Circuit Design (four terms)
Fri Jan 01 1993 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon May 01 1995 00:00:00 GMT+0000 (Coordinated Universal Time)