
Di Yang
Enthusiastic in Physical Design Flow and Methodology, digital circuit design and verification, ASIC design and verification, P &... | San Francisco, California, United States
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Di Yang’s Emails dy****@nv****.com
Di Yang’s Phone Numbers No phone number available.
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Di Yang’s Location San Francisco, California, United States
Di Yang’s Expertise Enthusiastic in Physical Design Flow and Methodology, digital circuit design and verification, ASIC design and verification, P & R, VLSI, computer hardware and architecture.
Di Yang’s Current Industry Nvidia
Di
Yang’s Prior Industry
Cadence Design Systems
|
Tsmc North America
|
Nvidia
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Work Experience

Nvidia
Senior Physical Design Engineer
Thu Apr 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Tsmc North America
Senior Physical Design Engineer
Sat Dec 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Apr 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Cadence Design Systems
Lead Product Engineer
Sun Jan 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Dec 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Cadence Design Systems
Product Engineer
Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)