Guruprasad Kulkarni
Close to 14 years of extensive working experience specializing in ASIC Physical Design in various cutting edge technology... | Santa Clara, California, United States
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Guruprasad Kulkarni’s Emails gk****@sy****.com
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Guruprasad Kulkarni’s Location Santa Clara, California, United States
Guruprasad Kulkarni’s Expertise Close to 14 years of extensive working experience specializing in ASIC Physical Design in various cutting edge technology nodes across multiple foundries. ● Full Chip Implementation: bump planning, pad-ring/IO-ring planning; design partitioning, hierarchical implementation, constraints development, block implementation, full-chip integration and timing closure ● Full Chip physical verification: (DRC/LVS/ERC), reliability(MV-PM/ESD/EM/IR/DFx) and tapeout. ● Methodology projects: driven for tool/flow validation and third party memories, SSTL IOs and mixed signal IP qualifications ● Team management: Setup and managed teams, delivered 7 turn key customer projects in last 3 years ● Proactive problem solving with composition, team building and automation skills in Perl, Python and TCL ● Successfully taped out 11 fullchips in last 8 years in my capacity as Fullchip lead
Guruprasad Kulkarni’s Current Industry Apple
Guruprasad
Kulkarni’s Prior Industry
Karnataka Microelectronic Design Centre
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Atmel
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Rambus
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Synapse Design
|
Apple
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Work Experience
Apple
SOC Physical Design
Sat Aug 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Synapse Design
Lead - Physical Design
Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Aug 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)
Synapse Design
Technology Architect
Wed Mar 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Sep 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Rambus
Principal Engineer
Mon Feb 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Rambus
SMTS-II, Integrated Chip Design
Fri Feb 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Rambus
SMTS - Design Solutions
Tue Jun 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Atmel
IC Design Engineer
Fri Jan 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jun 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Karnataka Microelectronic Design Centre
Member of Technical Staff
Fri Jul 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Guruprasad Kulkarni Email Addresses
FAQ About Guruprasad Kulkarni
-
Guruprasad Kulkarni is located at
Santa Clara, California, United States -
Guruprasad Kulkarni is a
Close to 14 years of extensive working experience specializing in ASIC Physical Design in various cutting edge technology nodes across multiple foundries. ● Full Chip Implementation: bump planning, pad-ring/IO-ring planning; design partitioning, hierarchical implementation, constraints development, block implementation, full-chip integration and timing closure ● Full Chip physical verification: (DRC/LVS/ERC), reliability(MV-PM/ESD/EM/IR/DFx) and tapeout. ● Methodology projects: driven for tool/flow validation and third party memories, SSTL IOs and mixed signal IP qualifications ● Team management: Setup and managed teams, delivered 7 turn key customer projects in last 3 years ● Proactive problem solving with composition, team building and automation skills in Perl, Python and TCL ● Successfully taped out 11 fullchips in last 8 years in my capacity as Fullchip lead Apple -
Guruprasad Kulkarni currently works in the
Apple -
Guruprasad Kulkarni specializes in
Close to 14 years of extensive working experience specializing in ASIC Physical Design in various cutting edge technology nodes across multiple foundries. ● Full Chip Implementation: bump planning, pad-ring/IO-ring planning; design partitioning, hierarchical implementation, constraints development, block implementation, full-chip integration and timing closure ● Full Chip physical verification: (DRC/LVS/ERC), reliability(MV-PM/ESD/EM/IR/DFx) and tapeout. ● Methodology projects: driven for tool/flow validation and third party memories, SSTL IOs and mixed signal IP qualifications ● Team management: Setup and managed teams, delivered 7 turn key customer projects in last 3 years ● Proactive problem solving with composition, team building and automation skills in Perl, Python and TCL ● Successfully taped out 11 fullchips in last 8 years in my capacity as Fullchip lead -
Guruprasad Kulkarni speaks the following languages:
No languages available. -
Guruprasad Kulkarni has prior experience in the following industries:
Synapse Design , Synapse Design , Rambus , Rambus , Rambus , Atmel , Karnataka Microelectronic Design Centre -
Guruprasad Kulkarni has the following professional experience:
Apple , Synapse Design , Synapse Design , Rambus , Rambus , Rambus , Atmel , Karnataka Microelectronic Design Centre . -
You can view Guruprasad Kulkarni’s
LinkedIn profile at LinkedIn URL. -
Guruprasad Kulkarni’s work email addresses are
[email protected] . -
Guruprasad Kulkarni works at
Apple
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