
Hassan Moussa
Team oriented, with good communication and presentation skills. Fast learner, enthusiastic and curious with a strong attention to detail. Extensive... | France
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Hassan Moussa’s Emails hm****@ka****.com
Hassan Moussa’s Phone Numbers 3347618****
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Hassan Moussa’s Location France
Hassan Moussa’s Expertise Team oriented, with good communication and presentation skills. Fast learner, enthusiastic and curious with a strong attention to detail. Extensive experience with advanced verification methodologies (constraint random, coverage driven, verification reuse) as UVM, eRM on Unix-Based platforms. Strong experience in developing and maintaining complex verification environments using various methodologies, including Self-checking, reusable, automated verification environment, Constrained random generators and reference models. Expert level knowledge of test bench development using Object Oriented System Verilog. Experience in creating and maintaining block level test benches and converting them for top level usage. Experience in random and directed test methods, coverage analysis (code coverage and functional coverage) and score boarding. Strong logical and creative problem-solving skills with excellent analytical and debugging skills. Expertise to develop BFMs / Checkers / monitors / Scoreboards. Detailed experience in System Verilog Assertions implementation. Integration Verification experience involving ARM subsystems and interfaces (AMBA/AXI/etc.), DDR / memory controllers, I2C, SPI, etc. Knowledge of scripting languages like Perl and Unix Shell language. Contributing to creation and adoption of new verification methodologies. Familiar with the verification of Analog and Digital ASICs (Analog on Top Design). CAD Tools: Cadence/Synopsys. Revision Control Systems: clearcase, svn.
Hassan Moussa’s Current Industry Kalray
Hassan
Moussa’s Prior Industry
Sonifri
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Stmicroelectronics
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Dolphin Integration
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Kalray
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Work Experience

Kalray
Senior Digital Verification Engineer at Kalray Montbonnot - France
Sat Jan 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Stmicroelectronics
Sub-system / SOC level's Functional Verification Engineer
Fri Apr 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Stmicroelectronics
Lead ASIC Verification
Sat May 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)
Dolphin Integration
IP / Sub-system Functional verification Engineer
Wed Feb 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Apr 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Stmicroelectronics
Engineer's degree Internships
Tue Mar 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Aug 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time)
Sonifri
Technicien électronique
Mon Jan 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)