Jie Ruan

Jie Ruan

No headline available | San Jose, California, United States

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Work Experience

Capgemini

Senior DFT Engineer

Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Goke Us Lab

Staff Digital Design Engineer

Sat Jan 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Oct 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)

Meta

Digital Design Engineer

Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)

Gyrfalcon Technology

Senior ASIC Design Engineer

Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)

Credo

Senior Staff ASIC Design Engineer

Mon Jan 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)

Nuvoton Technology

Senior Staff ASIC Design Engineer

Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

Marvell

Senior ASIC Design Engineer

Tue Jan 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

Amcc

Senior Design Engineer

Mon Jan 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)

Pmc Sierra

Product Design Engineer

Thu Jan 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)

Skills

Languages

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