
Jingyu Wen
Experience in architecture definition, logic design, verification using OVM/UVM and physical design flow and quality verification, including simulation,... | Santa Clara, California, United States
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Jingyu Wen’s Emails ji****@in****.com
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Jingyu Wen’s Location Santa Clara, California, United States
Jingyu Wen’s Expertise Experience in architecture definition, logic design, verification using OVM/UVM and physical design flow and quality verification, including simulation, test sequence coding, coverage, synthesis, PnR, timing convergence, logic equivalent verification, reliability verification, noise fixing, power optimization and etc..
Jingyu Wen’s Current Industry Intel
Jingyu
Wen’s Prior Industry
University Of Southern California
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Intel
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Work Experience

Intel
Silicon Architecture Engineer
Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
SoC Design Engineer
Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
University Of Southern California
Grader (Computer Systems Organization)
Sat Aug 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)