Joan Tseng

Joan Tseng

Currently, I focus on Soc integration, part of IP development, and automatic design flow. As an engineer in... | Taiwan

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Work Experience

美光科技

Senior Engineer

Mon Mar 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Realtek Semiconductor

Senior Engineer

Mon Jul 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Mar 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)

Vertexcom Technologies

Senior Engineer (Digital Ic Design)

Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jun 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)

Vango Technologies

Senior Digital Design Engineer

Sat Oct 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

台揚科技

Engineer Ii

Sat Sep 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Sep 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

Micron Technology

Senior Engineer

— Present

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