Joe Entjer

FAQ About Joe Entjer

• What is Joe Entjer's address?

  Joe Entjer is located at
  San Jose, California, United States

• What is Joe Entjer's job title?

  Joe Entjer is a
  Specialties: Extensive Experience in Layout Design Methodology, Physical Design integration, and Verification. Capable of taking a chip from R&D to final layout and tapeout. • Extensive Experience in Layout Design Methodology & Physical Design. • Chip Level Floor Planning, Organization, and Project Scheduling. • Full Custom Analog Layout, from R&D to Full Chip Layout. • Custom Digital Layout, Standard Cell Development and Place & Route Experience. • Experience In 64Bit Microprocessor and Multi Thread Processor Design. • Memory Design, including LRAM, MRAM, ROM, PLA, and CACHE. • 2 GHz DSP, 2 GHz Multi Port Rams, 2 GHz Balanced Fabric. • Extensive IO Pad Design, including ESD, Latchup Prevention and Bump planning. • 14.1 GBPS Serdes , 6 GHz GPIO, Bandgap, POR, E-Fuse, ADC’s • Chip level integration, Complete Fabric level integration and clock tree support. • Excellent Communication Skills, Fast Learning Curve, Team Leader. • Project & Group Management, Training of less experienced Layout Designers. • CADENCE Administration, Virtuoso, VXL, Schematic Capture, Place&Route. • MENTOR GRAPHICS Technical Support, Calibre Hierarchical LVS & RVE. • Enterprise Layout Editor and Hercules Hierarchical Physical Verification. • Basic Skill Programming and some Ample Programming. • Unix System Support, HTML Documentation, and Microsoft Office tools. Ampere

• What industry does Joe Entjer currently work in?

  Joe Entjer currently works in the
  Ampere

• What is Joe Entjer's area of expertise?

  Joe Entjer specializes in
  Specialties: Extensive Experience in Layout Design Methodology, Physical Design integration, and Verification. Capable of taking a chip from R&D to final layout and tapeout. • Extensive Experience in Layout Design Methodology & Physical Design. • Chip Level Floor Planning, Organization, and Project Scheduling. • Full Custom Analog Layout, from R&D to Full Chip Layout. • Custom Digital Layout, Standard Cell Development and Place & Route Experience. • Experience In 64Bit Microprocessor and Multi Thread Processor Design. • Memory Design, including LRAM, MRAM, ROM, PLA, and CACHE. • 2 GHz DSP, 2 GHz Multi Port Rams, 2 GHz Balanced Fabric. • Extensive IO Pad Design, including ESD, Latchup Prevention and Bump planning. • 14.1 GBPS Serdes , 6 GHz GPIO, Bandgap, POR, E-Fuse, ADC’s • Chip level integration, Complete Fabric level integration and clock tree support. • Excellent Communication Skills, Fast Learning Curve, Team Leader. • Project & Group Management, Training of less experienced Layout Designers. • CADENCE Administration, Virtuoso, VXL, Schematic Capture, Place&Route. • MENTOR GRAPHICS Technical Support, Calibre Hierarchical LVS & RVE. • Enterprise Layout Editor and Hercules Hierarchical Physical Verification. • Basic Skill Programming and some Ample Programming. • Unix System Support, HTML Documentation, and Microsoft Office tools.

• Which languages does Joe Entjer speak? 

  Joe Entjer speaks the following languages:
  No languages available.

• Which industries has Joe Entjer previously worked in?   

  Joe Entjer has prior experience in the following industries:
  Apple , Altera , Tabula , Tabula , Nvidia , Sun Microsystems , Matrix Semi , Hal Computer Systems , Teragen , Exar , Sierra Semiconductor

• What is Joe Entjer’s work experience?  

  Joe Entjer has the following professional experience:
  Ampere , Apple , Altera , Tabula , Tabula , Nvidia , Sun Microsystems , Matrix Semi , Hal Computer Systems , Teragen , Exar , Sierra Semiconductor .

• How can I find Joe Entjer on LinkedIn?  

  You can view Joe Entjer’s
  LinkedIn profile at LinkedIn URL.

• What are Joe Entjer’s work email addresses?  

  Joe Entjer’s work email addresses are
  [email protected] .

• What company does Joe Entjer work for?  

  Joe Entjer works at
  Ampere