Josef Polin
Developing automation framework and validation flows. Real Time Embedded Systems and Microprocessor Programming ( Linux kernel, C/C++ ). FPGA design... | Israel
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Josef Polin’s Emails jo****@mo****.com
Josef Polin’s Phone Numbers 1877867****
Social Media
Josef Polin’s Location Israel
Josef Polin’s Expertise Developing automation framework and validation flows. Real Time Embedded Systems and Microprocessor Programming ( Linux kernel, C/C++ ). FPGA design and verification flow ModelSim, Precision synthesis, ISE and Vivado ( for Xilinx ) RTL Design. SoC and SoM. MATLAB DFT and Image processing algorithm developing. Simulink model design. Hardware Board Design. ORCAD flow form Capture and PSpice to PCB Layout design.
Josef Polin’s Current Industry Mobileye
Josef
Polin’s Prior Industry
Mobileye
|
Lev Academic Center
|
Laboratoire Quantup
|
Aka Advanced Technologies
|
Devalore
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Work Experience
Mobileye
Embedded RT Linux Engineer
Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Mobileye
SW Automation Validation Engineer
Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Devalore
SW Automation Validation Engeneer (by Intel)
Tue Nov 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Feb 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Aka Advanced Technologies
HW and RT Engineer
Mon Feb 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Oct 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Laboratoire Quantup
Electrical and Hardware developer
Sun Feb 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Lev Academic Center
Academic Tutor
Sun Sep 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Mobileye
Embedded RT Linux Engineer
— PresentSkills
Languages
Josef Polin Email Addresses
Josef Polin Phone Number
FAQ About Josef Polin
-
Josef Polin is located at
Israel -
Josef Polin is a
Developing automation framework and validation flows. Real Time Embedded Systems and Microprocessor Programming ( Linux kernel, C/C++ ). FPGA design and verification flow ModelSim, Precision synthesis, ISE and Vivado ( for Xilinx ) RTL Design. SoC and SoM. MATLAB DFT and Image processing algorithm developing. Simulink model design. Hardware Board Design. ORCAD flow form Capture and PSpice to PCB Layout design. Mobileye -
Josef Polin currently works in the
Mobileye -
Josef Polin specializes in
Developing automation framework and validation flows. Real Time Embedded Systems and Microprocessor Programming ( Linux kernel, C/C++ ). FPGA design and verification flow ModelSim, Precision synthesis, ISE and Vivado ( for Xilinx ) RTL Design. SoC and SoM. MATLAB DFT and Image processing algorithm developing. Simulink model design. Hardware Board Design. ORCAD flow form Capture and PSpice to PCB Layout design. -
Josef Polin speaks the following languages:
No languages available. -
Josef Polin has prior experience in the following industries:
Mobileye , Devalore , Aka Advanced Technologies , Laboratoire Quantup , Lev Academic Center -
Josef Polin has the following professional experience:
Mobileye , Mobileye , Devalore , Aka Advanced Technologies , Laboratoire Quantup , Lev Academic Center , Mobileye . -
You can view Josef Polin’s
LinkedIn profile at LinkedIn URL. -
Josef Polin’s work email addresses are
[email protected] . -
Josef Polin works at
Mobileye
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