
Josh Marks
I am a passionate Machine Learning and Software Engineer. I love pushing the state of machine learning forward... | Menlo Park, California, United States
*50 free lookup(s) per month.
No credit card required.
Josh Marks’s Emails jo****@dd****.mil
Josh Marks’s Phone Numbers No phone number available.
Social Media
Josh Marks’s Location Menlo Park, California, United States
Josh Marks’s Expertise I am a passionate Machine Learning and Software Engineer. I love pushing the state of machine learning forward and finding new and interesting applications for deep neural networks.
Josh Marks’s Current Industry Istari
Josh
Marks’s Prior Industry
University Of Delaware
|
Chip Design Systems
|
National Science Foundation
|
Norwegian Centre For Space Related Education
|
Defense Digital Service
|
Tesla
|
Istari
Not the Josh Marks you were looking for?
Find accurate emails & phone numbers for over 700M professionals.
Work Experience

Istari
Principal AI Engineer
Wed Mar 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Tesla
Staff Electrical Engineer
Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Mar 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Defense Digital Service
Digital Service Expert
Sun Dec 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Chip Design Systems
Data Science (Non-Uniformity Correction)
Sun Jan 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Norwegian Centre For Space Related Education
NAROM Summer Fellow
Fri Jul 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Aug 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Chip Design Systems
Principal Investigator
Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Dec 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Chip Design Systems
Lead Analog Hardware Design Engineer
Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Dec 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Chip Design Systems
ASIC Design Engineer
Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
National Science Foundation
National Science Foundation - EAPSI Fellow
Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Aug 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
University Of Delaware
Graduate Student
Wed Jun 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Chip Design Systems
Hardware Design Engineer
Sat Jan 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
University Of Delaware
Research Engineer
Thu Jan 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)