
Kanan Saurabh
20 years of experience in High Speed Serial Links, RF, Circuit Design, System Architecture, post-silicon validation, Team setup... | Bengaluru, Karnataka, India
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Kanan Saurabh’s Emails ka****@in****.com
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Kanan Saurabh’s Location Bengaluru, Karnataka, India
Kanan Saurabh’s Expertise 20 years of experience in High Speed Serial Links, RF, Circuit Design, System Architecture, post-silicon validation, Team setup and leadership, Vendor and Customer relationship management. Enjoys customer facing roles. Knowledge of all aspects of circuit and system design from business case to feature closure and high volume ramp. Experienced in hiring and setting up >20 member teams in Singapore and Bengaluru respectively. Currently leading a multi-disciplinary ~80 member project team to deliver industry leading serial link solutions at leading edge process nodes. Experienced in driving diverse disciplines (aside from my background area of circuit design and validation) including firmware, system validation, pre-silicon verification and logic design. Delivered industry leading GNSSRF solution as well as high visibility watch cellular modem RF solution to tier1 customer. Worked on GNSS, NFC, BT, PCI6, Ethernet, Analog and Digital PLL and 3G/LTE Cellular Transceivers. Led multiple projects to high-value production ramp and market release
Kanan Saurabh’s Current Industry Intel
Kanan
Saurabh’s Prior Industry
Texas Instruments
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Oxford Semiconductors
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St Ericsson
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Intel
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Work Experience

Intel
High speed design and management
Sat Jan 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Texas Instruments
Analog Design Manager
Wed Jan 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
RF/Analog Design Manager
Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Dec 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
St Ericsson
Member of Technical Staff
Sat Aug 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Oxford Semiconductors
Staff Engineer
Tue May 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Aug 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)
Texas Instruments
Senior Design Engineer
Wed Jan 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)