Kevin Woo

Kevin Woo

No headline available | Irvine, California, United States

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Work Experience

Nvidia

Senior FPGA Logic Design Engineer

Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Masimo

Senior ASIC Engineer

Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)

Broadcom

Digital IC Design Engineer

Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Feb 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)

Northrop Grumman

Digital FPGA Engineer

Sat Jul 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)

Northrop Grumman

Systems Test Engineer

Sat Apr 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jul 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

Lockheed Martin

Systems Engineer Associate

Wed Jul 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Mar 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

Dexcom

Hardware Engineer Intern

Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Sep 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

University Of California San Diego

Electrical Engineering Researcher

Mon Apr 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Sep 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

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