Kiran Upadhyayula
I'm an experienced Logic Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in... | Olympia, Washington, United States
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Kiran Upadhyayula’s Emails ku****@ex****.microsoft
Kiran Upadhyayula’s Phone Numbers No phone number available.
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Kiran Upadhyayula’s Location Olympia, Washington, United States
Kiran Upadhyayula’s Expertise I'm an experienced Logic Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, C firmware, mixed signal debug, post Si debug using lab equipment, Si bring up, Cadence Virtuoso, Digital Circuit Design, Universal Verification Methodology (UVM), SystemVerilog, and Cadence. Strong engineering professional with a Master’s Degree focused in Electrical and Electronics Engineering from University of Washington.
Kiran Upadhyayula’s Current Industry Microsoft
Kiran
Upadhyayula’s Prior Industry
Intel
|
Microsoft
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Work Experience
Microsoft
Senior Hardware Engineer
Thu Sep 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Microsoft
Hardware Engineer 2
Sat May 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Sep 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Digital Design Engineer
Fri Nov 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Apr 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Logic Design Engineer
Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Nov 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Graduate Technical Intern
Tue Jan 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Sep 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Kiran Upadhyayula Email Addresses
FAQ About Kiran Upadhyayula
-
Kiran Upadhyayula is located at
Olympia, Washington, United States -
Kiran Upadhyayula is a
I'm an experienced Logic Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, C firmware, mixed signal debug, post Si debug using lab equipment, Si bring up, Cadence Virtuoso, Digital Circuit Design, Universal Verification Methodology (UVM), SystemVerilog, and Cadence. Strong engineering professional with a Master’s Degree focused in Electrical and Electronics Engineering from University of Washington. Microsoft -
Kiran Upadhyayula currently works in the
Microsoft -
Kiran Upadhyayula specializes in
I'm an experienced Logic Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, C firmware, mixed signal debug, post Si debug using lab equipment, Si bring up, Cadence Virtuoso, Digital Circuit Design, Universal Verification Methodology (UVM), SystemVerilog, and Cadence. Strong engineering professional with a Master’s Degree focused in Electrical and Electronics Engineering from University of Washington. -
Kiran Upadhyayula speaks the following languages:
No languages available. -
Kiran Upadhyayula has prior experience in the following industries:
Microsoft , Intel , Intel , Intel -
Kiran Upadhyayula has the following professional experience:
Microsoft , Microsoft , Intel , Intel , Intel . -
You can view Kiran Upadhyayula’s
LinkedIn profile at LinkedIn URL. -
Kiran Upadhyayula’s work email addresses are
[email protected] . -
Kiran Upadhyayula works at
Microsoft
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