Krunal Patel
-> HDL based RTL logic design, verification and synthesis -> SystemVerilog based design and verification -> DFT techniques, Semiconductor manufacturing... | 1255 University AvenueApartment 237, Sacramento, United States
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Krunal Patel’s Emails kp****@mi****.com
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Krunal Patel’s Location 1255 University AvenueApartment 237, Sacramento, United States
Krunal Patel’s Expertise -> HDL based RTL logic design, verification and synthesis -> SystemVerilog based design and verification -> DFT techniques, Semiconductor manufacturing process -> CMOS circuit design, simulation and layout -> x86 system architecture, parallel computer architecture -> ASIC design methodology -> Static timing analysis Specialties: HDL : Verilog, VHDL HVL : SystemVerilog Scripts : Perl, TCL Languages: C, C++, Assembly OS : LINUX, UNIX, Windows Tools: VCS, Design Compiler, PrimeTime, Xilinx ISE, Modelsim, Ledit, PSpice, Matlab Protocol : PCI, PCI Express, MESI, Dragon
Krunal Patel’s Current Industry Amd
Krunal
Patel’s Prior Industry
Microlink Solution
|
Microsemi
|
Amd
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Work Experience
Amd
Senior Member Of Technical Staff
Tue Feb 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Microsemi
Product Design Engineer
Sun Jan 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Feb 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Microlink Solution
Project trainee
Fri Feb 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu May 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Krunal Patel Email Addresses
FAQ About Krunal Patel
-
Krunal Patel is located at
1255 University AvenueApartment 237, Sacramento, United States -
Krunal Patel is a
-> HDL based RTL logic design, verification and synthesis -> SystemVerilog based design and verification -> DFT techniques, Semiconductor manufacturing process -> CMOS circuit design, simulation and layout -> x86 system architecture, parallel computer architecture -> ASIC design methodology -> Static timing analysis Specialties: HDL : Verilog, VHDL HVL : SystemVerilog Scripts : Perl, TCL Languages: C, C++, Assembly OS : LINUX, UNIX, Windows Tools: VCS, Design Compiler, PrimeTime, Xilinx ISE, Modelsim, Ledit, PSpice, Matlab Protocol : PCI, PCI Express, MESI, Dragon Amd -
Krunal Patel currently works in the
Amd -
Krunal Patel specializes in
-> HDL based RTL logic design, verification and synthesis -> SystemVerilog based design and verification -> DFT techniques, Semiconductor manufacturing process -> CMOS circuit design, simulation and layout -> x86 system architecture, parallel computer architecture -> ASIC design methodology -> Static timing analysis Specialties: HDL : Verilog, VHDL HVL : SystemVerilog Scripts : Perl, TCL Languages: C, C++, Assembly OS : LINUX, UNIX, Windows Tools: VCS, Design Compiler, PrimeTime, Xilinx ISE, Modelsim, Ledit, PSpice, Matlab Protocol : PCI, PCI Express, MESI, Dragon -
Krunal Patel speaks the following languages:
No languages available. -
Krunal Patel has prior experience in the following industries:
Microsemi , Microlink Solution -
Krunal Patel has the following professional experience:
Amd , Microsemi , Microlink Solution . -
You can view Krunal Patel’s
LinkedIn profile at LinkedIn URL. -
Krunal Patel’s work email addresses are
[email protected] . -
Krunal Patel works at
Amd
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