Lakshman Vijrothu

FAQ About Lakshman Vijrothu

• What is Lakshman Vijrothu's address?

  Lakshman Vijrothu is located at
  Bengaluru, Karnataka, India

• What is Lakshman Vijrothu's job title?

  Lakshman Vijrothu is a
  Working as Principal ASIC CAD Engineer-II in Micron Technology, Hyderabad/Bangalore responsible for SOC and IP Verification tools and methodology, Infrastructure and Design Automation, Leading Hyderabad ASIC CAD team. Worked as Member Technical staff Design engineer at AMD's client SOC group responsible for SOC Design automation methodologies and flows. Worked as Senior CAD Engineer at Lattice Semiconductor responsible for Site CAD/EDA activities for Digital and few Analog tools and methodologies. Worked as Sr.Design Engineer at AMD. CV(central verification) team or VMT(Verification Methodology Technology). Responsible for Development and support of 1. SOC and IP tool versions alignment automation 2.Perfroce wrappers(workspace management) 3.Vendor tool Qualification(VCS-MX) 4.RTL delivery flows used within AMD teams(like CAD,FEINT etc.) Worked as Front-end CAD engineer at Qualcomm on Autoreg and Autoseq development. These are set of tools and processes that capture register and configuration data into a simple set of text source files. These text files define register content, configuration information, and programming sequences. Worked as Consultant at AMD on the pay roll of Magna Infotech. Worked in Central Verification Team as Global Build Flow developer Responsible for development and Support of Global Build tool. Global Build is a tool written using PERL and Makefiles mostly. It is a program that reads build descriptions and produces a Makefile which is parallel safe. It creates simulation executable for VCS, runs Leda, runs RTL portioning and lining etc. Any Make file flow can be integrated to it using a project specific make file Worked as Consultant in Product Validation for Cadence's Allegro FPGA system Planner. Worked on Xilinx and Altera FPGA architectures. Responsible for Automation of FSP validation and generation of libraries for Xilinx and Altera FPGAs Worked as Associate Member Technical Staff in Taray on Memory Interface Generator for Xilinx FPGAs. Responsible for Verification and validation of MIG tool and the generated designs. Micron Technology

• What industry does Lakshman Vijrothu currently work in?

  Lakshman Vijrothu currently works in the
  Micron Technology

• What is Lakshman Vijrothu's area of expertise?

  Lakshman Vijrothu specializes in
  Working as Principal ASIC CAD Engineer-II in Micron Technology, Hyderabad/Bangalore responsible for SOC and IP Verification tools and methodology, Infrastructure and Design Automation, Leading Hyderabad ASIC CAD team. Worked as Member Technical staff Design engineer at AMD's client SOC group responsible for SOC Design automation methodologies and flows. Worked as Senior CAD Engineer at Lattice Semiconductor responsible for Site CAD/EDA activities for Digital and few Analog tools and methodologies. Worked as Sr.Design Engineer at AMD. CV(central verification) team or VMT(Verification Methodology Technology). Responsible for Development and support of 1. SOC and IP tool versions alignment automation 2.Perfroce wrappers(workspace management) 3.Vendor tool Qualification(VCS-MX) 4.RTL delivery flows used within AMD teams(like CAD,FEINT etc.) Worked as Front-end CAD engineer at Qualcomm on Autoreg and Autoseq development. These are set of tools and processes that capture register and configuration data into a simple set of text source files. These text files define register content, configuration information, and programming sequences. Worked as Consultant at AMD on the pay roll of Magna Infotech. Worked in Central Verification Team as Global Build Flow developer Responsible for development and Support of Global Build tool. Global Build is a tool written using PERL and Makefiles mostly. It is a program that reads build descriptions and produces a Makefile which is parallel safe. It creates simulation executable for VCS, runs Leda, runs RTL portioning and lining etc. Any Make file flow can be integrated to it using a project specific make file Worked as Consultant in Product Validation for Cadence's Allegro FPGA system Planner. Worked on Xilinx and Altera FPGA architectures. Responsible for Automation of FSP validation and generation of libraries for Xilinx and Altera FPGAs Worked as Associate Member Technical Staff in Taray on Memory Interface Generator for Xilinx FPGAs. Responsible for Verification and validation of MIG tool and the generated designs.

• Which languages does Lakshman Vijrothu speak? 

  Lakshman Vijrothu speaks the following languages:
  No languages available.

• Which industries has Lakshman Vijrothu previously worked in?   

  Lakshman Vijrothu has prior experience in the following industries:
  Micron Technology , Micron Technology , Amd , Lattice Semiconductor , Amd , Qualcomm , Amd , Cadence Design Systems , Taray Technologies

• What is Lakshman Vijrothu’s work experience?  

  Lakshman Vijrothu has the following professional experience:
  Micron Technology , Micron Technology , Micron Technology , Amd , Lattice Semiconductor , Amd , Qualcomm , Amd , Cadence Design Systems , Taray Technologies .

• How can I find Lakshman Vijrothu on LinkedIn?  

  You can view Lakshman Vijrothu’s
  LinkedIn profile at LinkedIn URL.

• What are Lakshman Vijrothu’s work email addresses?  

  Lakshman Vijrothu’s work email addresses are
  [email protected].

• What company does Lakshman Vijrothu work for?  

  Lakshman Vijrothu works at
  Micron Technology