Marcus Kienlen

Marcus Kienlen

Currently a Defect Metrology TD Process Engineer at Intel with a Master of Science degree in semiconductor processing... | Eugene, Oregon, United States

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Work Experience

Intel

Process TD Engineer

Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Triquint Semiconductor

Process Engineering Intern - Defect Analysis

Tue Oct 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Manufacturing Technician

Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Pacific University

Physics Teaching Assistant

Thu Sep 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Apr 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)

Pacific University

Research Assistant

Sat May 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)

Pacific Coast Fruit

Warehouse Worker

Thu Jan 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)

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