
Marjan Mokhtaari
•Expert in signal integrity analysis and system level frequency domain (scattering parameters model extraction) and time domain simulations... | San Jose, California, United States
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Marjan Mokhtaari’s Location San Jose, California, United States
Marjan Mokhtaari’s Expertise •Expert in signal integrity analysis and system level frequency domain (scattering parameters model extraction) and time domain simulations (Hspice and IBIS AMI) from Silicon to Package and PCB for SerDes interfaces (Ethernet 100G/400G Transceivers in NRZ mode up to 32Gbps and PAM4 up to 57.8Gbps and 112Gbps and PCIE GEN3/GEN4 ) and RF analogue signals (ADC/DAC up to 64GSps) from Feasibility study to defining stackup and PCB layout design guideline by using 2.5D and 3D CAD simulation tools such as HFSS, CST in both pre and post layout design phases to meet all electrical design specification. •Proficient on Signal integrity analysis and simulation in both frequency domain and time domain ( Hspice or IBIS models) for parallel Data interfaces such as DDR/QDR memories (DDR3-DDR4 up to 3200Mbps), flash memories and HBM (Memory In package) covering various technologies (LPDDR, etc) and topologies (DIMM, UDIMM, SODIMM, RDIMM, LRDIMM,SDRAMS (down memories), etc) by various 2.5D tools (Cadence Sigrity/Power SI, siwave, Keysight ADS, Hspice) to prepare layout guideline and ensure the quality of interfaces performance based on JDEC and device spec (in both pre and post layout phases y performing system level simulation covering ISI-Xtalk-SSO/SSN) •Professionally skilled on power integrity analysis and system level simulations (from DC-IR Drop to frequency and time domains) from silicon to package and PCB-VRM by use of Cadence Power SI and power DC simulation tools to prepare design guideline in pre layout stage and to ensure the quality of power distribution networks in post layout phase •Highly accomplished on Ethernet/PCIE Serial High-Speed signal and power integrity analysis, simulation, optimization in package (package layout design guideline and simulation, bumpout, ballout assignment) by 3D CAD tools (including HFSS/Ansoft, Q3D and CST Microwave Studio, etc) to meet package specifications •Hand-on experienced on SerDes, RF and DDR measurement tools in mm waves, electromagnetics, signal and power integrity areas (VNA up to 116G, TDR, time domain Oscilloscope, spectrum analyzer) for checking the quality of layout/design in both frequency domain and time domain for the purpose of correlation between measurement and simulation and to perform validation and root cause debugging •Strong background in electromagnetics (EM) and Microwave/RF fields and transmission line theory along with leadership skills to work with multi-functional teams •Skilled on RF EMC /EMI (Electromagnetic compatibility) test /measurements
Marjan Mokhtaari’s Current Industry Intel
Marjan
Mokhtaari’s Prior Industry
Firgelli Technologies
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Pmc Sierra
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Intel
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Work Experience

Intel
Signal and Power Integrity Board Design Engineer- Senior Staff
Tue Apr 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Pmc Sierra
Signal and Power Integrity Package Design Engineer
Sat Jan 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Dec 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Firgelli Technologies
RF EMI/EMC Research, Design, Development and Test Engineer
Tue Sep 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)