Matthew Winrow
CPU design & verification engineer with significant experience in the Arm architecture, specialising in instruction fetch including instruction... | Greater Cambridge Area, Greater Cambridge Area, United Kingdom
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Matthew Winrow’s Emails mw****@ar****.com
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Matthew Winrow’s Location Greater Cambridge Area, Greater Cambridge Area, United Kingdom
Matthew Winrow’s Expertise CPU design & verification engineer with significant experience in the Arm architecture, specialising in instruction fetch including instruction cache and branch predictor micro-architectures. Extensive experience of SystemVerilog for both design and verification, up to and including IEEE 1800-2017, and UVM. My current focus lies in verification, where I am motivated to drive practical improvements to unit-level verification, especially in SystemVerilog/UVM testbenches. An expert in the SystemVerilog language and its features, I am leading a fetch verification team with cross-project and cross-site collaboration. I am also actively involved in delivering group-wide verification improvements.
Matthew Winrow’s Current Industry ARM
Matthew
Winrow’s Prior Industry
ARM
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Work Experience
ARM
Principal Engineer
Sat Oct 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — PresentSkills
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Matthew Winrow Email Addresses
FAQ About Matthew Winrow
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Matthew Winrow is located at
Greater Cambridge Area, Greater Cambridge Area, United Kingdom -
Matthew Winrow is a
CPU design & verification engineer with significant experience in the Arm architecture, specialising in instruction fetch including instruction cache and branch predictor micro-architectures. Extensive experience of SystemVerilog for both design and verification, up to and including IEEE 1800-2017, and UVM. My current focus lies in verification, where I am motivated to drive practical improvements to unit-level verification, especially in SystemVerilog/UVM testbenches. An expert in the SystemVerilog language and its features, I am leading a fetch verification team with cross-project and cross-site collaboration. I am also actively involved in delivering group-wide verification improvements. ARM -
Matthew Winrow currently works in the
ARM -
Matthew Winrow specializes in
CPU design & verification engineer with significant experience in the Arm architecture, specialising in instruction fetch including instruction cache and branch predictor micro-architectures. Extensive experience of SystemVerilog for both design and verification, up to and including IEEE 1800-2017, and UVM. My current focus lies in verification, where I am motivated to drive practical improvements to unit-level verification, especially in SystemVerilog/UVM testbenches. An expert in the SystemVerilog language and its features, I am leading a fetch verification team with cross-project and cross-site collaboration. I am also actively involved in delivering group-wide verification improvements. -
Matthew Winrow speaks the following languages:
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Matthew Winrow has prior experience in the following industries:
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Matthew Winrow has the following professional experience:
ARM . -
You can view Matthew Winrow’s
LinkedIn profile at LinkedIn URL. -
Matthew Winrow’s work email addresses are
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Matthew Winrow works at
ARM
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