Minki Cho
My specialties are low power circuit/VLSI techniques, power management techniques, and low power design. I have a proven... | 15347 Northwest Sweetgale Lane, Portland, United States
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Minki Cho’s Location 15347 Northwest Sweetgale Lane, Portland, United States
Minki Cho’s Expertise My specialties are low power circuit/VLSI techniques, power management techniques, and low power design. I have a proven track record of successful IC designs (30+ publications, and 7 tape-outs as a chip-lead). Skilled at various aspects of SoC design: RTL design, digital circuit design, mixed-signal circuit design, RTL/circuit simulation, functional verification, logic synthesis, APR, timing constraints, timing closure, and post-silicon testing. FPGA VHDL/Verilog programming. TDC, TRC(tunable replica circuit), monitoring sensor design Test-chip experience: IBM 130nm -inverse temperature dependence characterization Intel 22/14/10/7nm for adaptive clocking for improving performance, reliability characterization, dynamic power gating, a local charge for droop mitigation Lead multiple tape-out Tools: APR, FEV, Primetime, Design compiler, tcl, SPICE, Matlab, Jmp, Perl, Verilog, Verilog-A, VHDL, FPGA programming, Python Simulation (power grid voltage droop, digital, analog, aging), soft error/votlage droop modeling, mixed-signal circuit design, implementation, pll Testing: power/voltage droop, frequency, adaptive techniques with FPGA and board
Minki Cho’s Current Industry Intel
Minki
Cho’s Prior Industry
Georgia Institute Of Technology
|
Intel
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Work Experience
Intel
Staff Research Scientist
Sat Apr 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
Senior Research Scientist
Sat Sep 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Apr 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Graduate Technical Intern
Sun May 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Aug 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)
Georgia Institute Of Technology
Graduate Research Assistant
Mon Jan 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Minki Cho Email Addresses
FAQ About Minki Cho
-
Minki Cho is located at
15347 Northwest Sweetgale Lane, Portland, United States -
Minki Cho is a
My specialties are low power circuit/VLSI techniques, power management techniques, and low power design. I have a proven track record of successful IC designs (30+ publications, and 7 tape-outs as a chip-lead). Skilled at various aspects of SoC design: RTL design, digital circuit design, mixed-signal circuit design, RTL/circuit simulation, functional verification, logic synthesis, APR, timing constraints, timing closure, and post-silicon testing. FPGA VHDL/Verilog programming. TDC, TRC(tunable replica circuit), monitoring sensor design Test-chip experience: IBM 130nm -inverse temperature dependence characterization Intel 22/14/10/7nm for adaptive clocking for improving performance, reliability characterization, dynamic power gating, a local charge for droop mitigation Lead multiple tape-out Tools: APR, FEV, Primetime, Design compiler, tcl, SPICE, Matlab, Jmp, Perl, Verilog, Verilog-A, VHDL, FPGA programming, Python Simulation (power grid voltage droop, digital, analog, aging), soft error/votlage droop modeling, mixed-signal circuit design, implementation, pll Testing: power/voltage droop, frequency, adaptive techniques with FPGA and board Intel -
Minki Cho currently works in the
Intel -
Minki Cho specializes in
My specialties are low power circuit/VLSI techniques, power management techniques, and low power design. I have a proven track record of successful IC designs (30+ publications, and 7 tape-outs as a chip-lead). Skilled at various aspects of SoC design: RTL design, digital circuit design, mixed-signal circuit design, RTL/circuit simulation, functional verification, logic synthesis, APR, timing constraints, timing closure, and post-silicon testing. FPGA VHDL/Verilog programming. TDC, TRC(tunable replica circuit), monitoring sensor design Test-chip experience: IBM 130nm -inverse temperature dependence characterization Intel 22/14/10/7nm for adaptive clocking for improving performance, reliability characterization, dynamic power gating, a local charge for droop mitigation Lead multiple tape-out Tools: APR, FEV, Primetime, Design compiler, tcl, SPICE, Matlab, Jmp, Perl, Verilog, Verilog-A, VHDL, FPGA programming, Python Simulation (power grid voltage droop, digital, analog, aging), soft error/votlage droop modeling, mixed-signal circuit design, implementation, pll Testing: power/voltage droop, frequency, adaptive techniques with FPGA and board -
Minki Cho speaks the following languages:
No languages available. -
Minki Cho has prior experience in the following industries:
Intel , Intel , Georgia Institute Of Technology -
Minki Cho has the following professional experience:
Intel , Intel , Intel , Georgia Institute Of Technology . -
You can view Minki Cho’s
LinkedIn profile at LinkedIn URL. -
Minki Cho’s work email addresses are
[email protected] . -
Minki Cho works at
Intel
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