Naveen Pathak

FAQ About Naveen Pathak

• What is Naveen Pathak's address?

  Naveen Pathak is located at
  New Delhi, Delhi, India

• What is Naveen Pathak's job title?

  Naveen Pathak is a
  Naveen Pathak 9625945676 Summary: Highly ambitious and passionate VLSI engineer with a strong focus on CPU Verification and Debugging. Demonstrated expertise in developing robust test plans, directing stimulus development, and ensuring thorough debugging and coverage closure for Core features. Committed to professional growth and seeking challenging opportunities to enhance my skillset. Proficient in designing and developing complex digital and analog circuits, dedicated to creating innovative and reliable semiconductor products. Committed to contributing to organizational growth while staying at the forefront of cutting-edge technologies in VLSI design and verification. Deep understanding of micro-architecture and proficiency in leveraging x86 and computer architecture principles in CPU Verification and Debugging processes. Proven ability to collaborate effectively in cross-functional teams, ensuring seamless coordination for successful project completion. Strong knowledge of programming languages, including Perl, C++, and C, enabling efficient development and optimization of CPU designs. Track record of delivering exceptional results within tight timelines and driving continuous improvement in design and verification methodologies. Avid learner dedicated to staying updated with emerging trends and advancements in VLSI design and verification, actively seeking opportunities to expand knowledge base and skillset. Key Skills: VLSI Design and Verification CPU Verification and Debugging Test Plan Development Stimulus Development Debugging and Troubleshooting Coverage Closure Complex Digital Circuit Design. Semiconductor Product Development Innovative Problem-Solving Cross-functional Collaboration Professional Experience: VLSI Engineer AMD India Pvt Ltd Spearheaded the development and execution of comprehensive test plans, resulting in improved verification efficiency by 20%. Directed stimulus development to ensure thorough testing of Core features, contributing to the identification and resolution of critical issues. Collaborated closely with cross-functional teams to address complex debugging challenges and achieve coverage closure for feature implementation. Developed and optimized complex digital and analog circuits, ensuring adherence to performance and reliability standards. Actively participated in design reviews and contributed valuable insights to enhance circuit performance and manufacturability. Education: Master's Degree in VLSI NIT Delhi Relevant coursework: VLSI Design, Digital Circuit Design and Verification Techniques Drdo Ministry Of Defence Govt

• What industry does Naveen Pathak currently work in?

  Naveen Pathak currently works in the
  Drdo Ministry Of Defence Govt

• What is Naveen Pathak's area of expertise?

  Naveen Pathak specializes in
  Naveen Pathak 9625945676 Summary: Highly ambitious and passionate VLSI engineer with a strong focus on CPU Verification and Debugging. Demonstrated expertise in developing robust test plans, directing stimulus development, and ensuring thorough debugging and coverage closure for Core features. Committed to professional growth and seeking challenging opportunities to enhance my skillset. Proficient in designing and developing complex digital and analog circuits, dedicated to creating innovative and reliable semiconductor products. Committed to contributing to organizational growth while staying at the forefront of cutting-edge technologies in VLSI design and verification. Deep understanding of micro-architecture and proficiency in leveraging x86 and computer architecture principles in CPU Verification and Debugging processes. Proven ability to collaborate effectively in cross-functional teams, ensuring seamless coordination for successful project completion. Strong knowledge of programming languages, including Perl, C++, and C, enabling efficient development and optimization of CPU designs. Track record of delivering exceptional results within tight timelines and driving continuous improvement in design and verification methodologies. Avid learner dedicated to staying updated with emerging trends and advancements in VLSI design and verification, actively seeking opportunities to expand knowledge base and skillset. Key Skills: VLSI Design and Verification CPU Verification and Debugging Test Plan Development Stimulus Development Debugging and Troubleshooting Coverage Closure Complex Digital Circuit Design. Semiconductor Product Development Innovative Problem-Solving Cross-functional Collaboration Professional Experience: VLSI Engineer AMD India Pvt Ltd Spearheaded the development and execution of comprehensive test plans, resulting in improved verification efficiency by 20%. Directed stimulus development to ensure thorough testing of Core features, contributing to the identification and resolution of critical issues. Collaborated closely with cross-functional teams to address complex debugging challenges and achieve coverage closure for feature implementation. Developed and optimized complex digital and analog circuits, ensuring adherence to performance and reliability standards. Actively participated in design reviews and contributed valuable insights to enhance circuit performance and manufacturability. Education: Master's Degree in VLSI NIT Delhi Relevant coursework: VLSI Design, Digital Circuit Design and Verification Techniques

• Which languages does Naveen Pathak speak? 

  Naveen Pathak speaks the following languages:
  No languages available.

• Which industries has Naveen Pathak previously worked in?   

  Naveen Pathak has prior experience in the following industries:
  National Institute Of Technology Delhi , Amd , National Institute Of Technology Delhi , Punj Lloyd , Jaypee Power 6603 Mw Power Plant

• What is Naveen Pathak’s work experience?  

  Naveen Pathak has the following professional experience:
  Drdo Ministry Of Defence Govt , National Institute Of Technology Delhi , Amd , National Institute Of Technology Delhi , Punj Lloyd , Jaypee Power 6603 Mw Power Plant .

• How can I find Naveen Pathak on LinkedIn?  

  You can view Naveen Pathak’s
  LinkedIn profile at LinkedIn URL.

• What are Naveen Pathak’s work email addresses?  

  Naveen Pathak’s work email addresses are
  [email protected] .

• What company does Naveen Pathak work for?  

  Naveen Pathak works at
  Drdo Ministry Of Defence Govt