
Nikhil Seshasayee
Professional Summary - A dynamic individual with over 20 years of experience in Application and Design Engineering of Electronic Systems... | India
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Nikhil Seshasayee’s Emails ni****@se****.com
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Nikhil Seshasayee’s Location India
Nikhil Seshasayee’s Expertise Professional Summary - A dynamic individual with over 20 years of experience in Application and Design Engineering of Electronic Systems for varied markets with core expertise in Power Management - Currently associated with Intel Corporation as SoC Design Engineer - Post Graduate with a Master of Technology Degree in Power Electronics - Experienced professional in leading different stages of product development efforts from design to production - 2 Patents Grant of USPTO on SSD Power Architectures - Author of several Technical Papers and Design Tools on Power Supplies - Presenter at various Texas Instruments seminars from 2007 in varied topics - A fluent communicator with good presentation skills. Knowledge Domain - Design, Development and Characterization of Power supplies for varied market segments - Strong debugging and Failure Analysis skills with high proficiency at using test and debugging instruments such as Digital Oscilloscopes, Network & Power Analyser’s, E-load etc. - Knowledge of Power Delivery Network (PDN) & Decap Analysis - Good understanding of Battery Chemistries along with design of Multi-Profiled Chargers and Health Monitoring Circuits - PCB design guidelines and Stackup - Knowledge of Digital Power Supply Design - Electrical Simulation Tools (PSpice, TINA, MATHCAD, LTSpice) - EDA Tools Cadence Concept and Orcad Capture for Schematics and Cadence Allegro and OrCad Layout for PCB design - Silicon Layout and Analysis Tools - Synopsys ICC2DP, Redhawk - Circuit Design Tools - Cadence Virtuoso
Nikhil Seshasayee’s Current Industry Intel
Nikhil
Seshasayee’s Prior Industry
Bms College Of Engineering
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Ge Global Research
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Ge Energy
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Texas Instruments
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Seagate Technology
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Intel
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Work Experience

Intel
Lead Engineer - Soc Design
Thu Feb 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Seagate Technology
Senior Staff - Hardware Development
Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Texas Instruments
Technical Lead - Analog
Sat Dec 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Ge Energy
Senior Applications Engineer
Fri Oct 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Dec 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)
Ge Global Research
Trainee Engineer
Fri Aug 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jun 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Bms College Of Engineering
Graduate Teaching Assistant
Thu Aug 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jul 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time)