
Prashant Admane
* 23+ years of experience in team bring up, mentoring, project planning and successful execution of projects in... | Bengaluru, Karnataka, India
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Prashant Admane’s Emails pr****@hc****.com
Prashant Admane’s Phone Numbers No phone number available.
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Prashant Admane’s Location Bengaluru, Karnataka, India
Prashant Admane’s Expertise * 23+ years of experience in team bring up, mentoring, project planning and successful execution of projects in Analog Mixed Signal verification, Analog circuit design and RF/Microwave domain. * Extensive experience in product (IP) bring up, from Design to siliconization till assembly and testing of the chips. * Well acquaintance of complete lifecycle of Analog and RF/microwave chips and systems. * Extensive experience in setting up new groups with team bring up, tool flow setup and IPs development. * Coordinated actively involved in AMS verification of full-chip and analog blocks. * Designed various circuits in CMOS and GaAs. Have system level experience. * Experience in managing various projects from Specs till packaging of the chips with responsibilities such as effort estimations, specifications review, finalization of architecture, implementation strategy, realization (by continuous interaction with team members, vendors and Clients), technical guidance to teammates, schedule tracking, meeting quality control requirements and delivery to the Client with detailed reports. * Extensive experience with EDA design tools such as Cadence, Synopsys, Mentor Graphics, Tanner, HP-ADS design platform, Design architect and simulator such as Eldo, HSPICE, Spectre, etc.
Prashant Admane’s Current Industry Hcl Technologies
Prashant
Admane’s Prior Industry
Maharashtra State Electricity Board
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Gaetec
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Controlnet
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Sasken
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Hcl Technologies
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Sasken Communication Technologies
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Tessolve Semiconductor
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Work Experience

Hcl Technologies
Group Technical Manager
Thu Apr 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Tessolve Semiconductor
Principal Engineer
Sat Aug 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Apr 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Sasken Communication Technologies
Principal Engineer
Thu Dec 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Aug 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Hcl Technologies
Senior Technical Lead
Mon Sep 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Nov 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)
Sasken
Senior Design Engineer
Sun May 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Sep 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)
Controlnet
Senior Design Engineer
Thu Nov 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun May 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time)
Gaetec
Circuit Design Engineer
Mon Nov 01 1999 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Nov 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time)
Maharashtra State Electricity Board
Graduate Apprentice
Sun Nov 01 1998 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Nov 01 1999 00:00:00 GMT+0000 (Coordinated Universal Time)