
Prathamesh Pavaskar
As a Senior Product Development Engineer at Intel, I apply my data science and statistical skills to optimize... | 15943 Northwest Hackney Drive, Portland, United States
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Prathamesh Pavaskar’s Location 15943 Northwest Hackney Drive, Portland, United States
Prathamesh Pavaskar’s Expertise As a Senior Product Development Engineer at Intel, I apply my data science and statistical skills to optimize the performance and yield of semiconductor products. I have over ten years of experience in this role, leading technical projects and collaborating with cross-functional teams to deliver innovative solutions. My background in electrical engineering and electrophysics enables me to leverage my knowledge of semiconductor fabrication, data analysis, and numerical optimization to enhance the quality and reliability of Intel's products. I have also contributed to the advancement of plasmonic and photoelectrochemical applications, publishing multiple papers and obtaining a patent in this field. I am passionate about solving complex problems and creating value for customers and stakeholders. I am always eager to learn new technologies and methods, and to share my expertise with others. My goal is to continue to grow as a product development engineer and to make a positive impact on the semiconductor industry.
Prathamesh Pavaskar’s Current Industry Intel
Prathamesh
Pavaskar’s Prior Industry
University Of Southern California
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Intel
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Work Experience

Intel
Senior Product Development Engineer
Sun Apr 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
Yield Analysis Engineer
Sat Jun 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Apr 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
University Of Southern California
Graduate Research Assistant at the Department of Electrical Engineering (Electrophysics)
Tue Jan 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed May 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
University Of Southern California
Teaching Assistant at the Department of Electrical Engineering (Electrophysics)
Tue Jan 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)