
Sandeep Ahuja
-25+ years of extensive industry experience mainly in ASIC Design Verification at block, subsystem, SoC, multi chip TB,... | 8469 Warden Lane, San Diego, United States
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Sandeep Ahuja’s Emails sa****@qu****.com
Sandeep Ahuja’s Phone Numbers 1858651****
Social Media
Sandeep Ahuja’s Location 8469 Warden Lane, San Diego, United States
Sandeep Ahuja’s Expertise -25+ years of extensive industry experience mainly in ASIC Design Verification at block, subsystem, SoC, multi chip TB, working as Individual contributor, Project lead and DV manager. -30+ full ASIC design cycle tapeout experience in RFIC (transceivers - 4G/LTE/GPS/5G sub-6/mmWave), BT/GPS baseband/RF, RFFE controllers (LNA,PA,Switches,ET), microprocessors (x86, ARM), graphics, PMIC, fingerprint sensor, game console and networking custom ASICs. -Strong understanding of computer architecture including internal busses AHB/AXI/PBUS/PIB/HyperTransport, external interfaces - MIPI RFFE/SPMI/SPI/I2C/HSUART/Qlink/Wireline MAC/PHY, RAM/ROM/OTP/Caches, Registers/FSM/Timers/Interrupts and overall system/performance of large/complex ASIC designs. -Extensive ASIC verification experience in test bench component coding (BFM/Agents, drivers, monitors, scoreboards, checkers, assertions), writing testplans and testcases, testbench infrastructure development, scripting, automation for simulation/regression setup and code/functional coverage. -Excellent analytical, programming (SystemVerilog, Specman/e, Verilog, C, C++, Perl) skills using constraint-random/datastructure/OOPS based DV coding practices. -In-depth exposure to latest verification methodologies (UVM) and simulators (Xcelium, VCS) using RTL and GLS/SDF self checking regressions. -Strong ability to find bugs in complicated RTL/Gate designs, mimic complex HW/SW interactions, concurrencies using advanced S/W techniques, system model/vector matching, scripting for analysis. -Performed roles of Verification Architect and experience working with Design, PD, Systems, RF/Analog, emulation, postSi(ATE, PTE, Lab bringup), PM teams. -Self-driven, motivated, always looking to improve the verification methodology, cut time to catch RTL bugs and get rid of inefficiency in the verification environment. -Performed DV manager (9+ years) duties including hiring, mentoring, performance reviews, conflict management, status tracking, escalations, hiring and process compliance.
Sandeep Ahuja’s Current Industry Qualcomm
Sandeep
Ahuja’s Prior Industry
Nortel Networks
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Wipro Technologies
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Hcl Technologies
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Calix Networks
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Crimson Microsystems
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Sirf Technology
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Advanced Micro Devices
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Qualcomm
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Work Experience

Qualcomm
Principal Engineer/Manager
Fri Nov 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Qualcomm
Sr Staff Engineer/Manager
Wed Oct 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Nov 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Qualcomm
Staff Engineer
Sun Apr 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Oct 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Advanced Micro Devices
MTS ASIC Design Verification Engineer
Tue Jul 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Apr 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Advanced Micro Devices
Consultant through SmartPlay (formerly Techforce Inc)
Sat Dec 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jul 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)
Sirf Technology
Lead Engineer ASIC
Sat May 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Nov 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)
Crimson Microsystems
Consultant through HCL Technologies
Wed Jan 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat May 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Calix Networks
Consultant through HCL Technologies
Tue May 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Oct 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)
Hcl Technologies
Project Lead
Thu Mar 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat May 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Wipro Technologies
Sr Systems Engineer
Thu Jul 01 1999 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Feb 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time)
Nortel Networks
Consultant through Wipro Technologies
Fri Jan 01 1999 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time)