Saravanan Kalinagasamy
Senior Director of Engineering, SoC Design Verification & Validation | San Jose, California, United States
*50 free lookup(s) per month.
No credit card required.
Saravanan Kalinagasamy’s Emails sa****@ae****.com
Saravanan Kalinagasamy’s Phone Numbers +1650353****
Social Media
Saravanan Kalinagasamy’s Location San Jose, California, United States
Saravanan Kalinagasamy’s Expertise Senior Director of Engineering, SoC Design Verification & Validation
Saravanan Kalinagasamy’s Current Industry Aeva
Saravanan
Kalinagasamy’s Prior Industry
Arasan Chip Systems
|
Atmel
|
EmpowerTel Networks
|
Teradiant Networks
|
Cortina Systems
|
SanDisk
|
Xilinx
|
Aeva
Not the Saravanan Kalinagasamy you were looking for?
Find accurate emails & phone numbers for over 700M professionals.
Work Experience

Aeva
Senior Director of Engineering, SoC Design Verification & Validation
2022-03-01 — Present
Xilinx
Director of Engineering, SoC Functional and Performance Verification
2017-11-01 — 2022-03-01
SanDisk
Senior Manager ASIC Design Verification
2012-04-01 — 2017-10-01
Cortina Systems
Engineering Manager
2009-06-01 — 2012-04-01
Cortina Systems
Tech Lead
2004-11-01 — 2012-04-01
Teradiant Networks
Senior Design Verification Engg
2002-04-01 — 2004-08-01
EmpowerTel Networks
Design Verification Engineer
2000-01-01 — 2002-01-01
Atmel
FPGA Engineer
1999-01-01 — 2000-01-01
Arasan Chip Systems
Design Engineer
1997-01-01 — 1999-01-01