
Sundeep Chauhan
• Focused and seasoned leader with a strong record of cost-efficient, timely delivery of engineering projects. • Strive... | San Francisco, California, United States
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Sundeep Chauhan’s Emails su****@wa****.com
Sundeep Chauhan’s Phone Numbers No phone number available.
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Sundeep Chauhan’s Location San Francisco, California, United States
Sundeep Chauhan’s Expertise • Focused and seasoned leader with a strong record of cost-efficient, timely delivery of engineering projects. • Strive for depth and breadth of knowledge, allowing me to make the right decisions. • Hands-on and familiar with all aspects of hardware design including architecture, schematics, layout, fab, assembly, bring-up, test, firmware, simulation, debug, test software, data collections and analysis. • 17 years of solid hands-on hardware design and 6 years of project/people management experience. Skills - • Engineering Management, Project Management, Budgeting, Resource Planning, Vendor Selection & Negotiation • FPGA - Xilinx & Altera, RTL Design - VHDL & Verilog, RTL Synthesizer - Xilinx & Synplify Pro, ChipScope-Pro • Digital Design Simulation - ModelSim & Xilinx, Analog Design Simulation - MultiSim & SPICE • Schematics - DxDesigner, PCB Layout - PADS, PCB Fab & Assembly - Fusion360, Signal Integrity - HyperLynx • ARM Cortex Firmware - C & FreeRTOS, Database - Cassandra & SQL, Programming - LabVIEW, Swift, Java • Lab - Oscilloscope, Spectrum Analyzer, Logic Analyzer, TIA, ARB, TDR, USB Analyzer, ARM debugger • Data Bus - USB 2.0, USB 3.0, PCIe Gen1, UART, SPI, I2C, CAN
Sundeep Chauhan’s Current Industry Semiconductor Industry
Sundeep
Chauhan’s Prior Industry
Conifer Networks
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Ample Communications
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Seagate Technology
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Wavepod Technologies
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Semiconductor Industry
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Work Experience

Semiconductor Industry
Sr Manager
Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Wavepod Technologies
Co-Founder
Wed Apr 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Seagate Technology
Principal Project/Program Manager
Tue Nov 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Apr 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Seagate Technology
Principal Development Engineer
Fri Feb 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Nov 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)
Seagate Technology
Sr. Staff Development Engineer
Sat Sep 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Feb 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)
Seagate Technology
Staff Development Engineer
Mon Nov 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Sep 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)
Seagate Technology
Sr. Electrical Engineer
Sun Jul 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Nov 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Ample Communications
Member Of Technical Staff
Sun Apr 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jun 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time)
Conifer Networks
Hardware Engineer
Tue Feb 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time)