Suraj Kulkarni

FAQ About Suraj Kulkarni

• What is Suraj Kulkarni's address?

  Suraj Kulkarni is located at
  Folsom, California, United States

• What is Suraj Kulkarni's job title?

  Suraj Kulkarni is a
  10 yrs of Electronics Industry experience in varied roles from Mixed-Signal IC design, Embedded system design, server platform SERDES (Ethernet) validation 6 yrs of experience in Mixed signal IC design for (DDR) Memory IP @ Intel Folsom (2019-Current) - With main focus on quality & timely delivery of the projects while introducing innovation to solve problems & ensure open communication. - Conducted detailed study of scalable Combo DDR5/LPDDR5 Tx Analog-Front-End architectures for Power-Perf-Area-Reliability - Delivered DDR Tx-AFE Resistance-compensation scheme with <5% tolerance using switched-capacitor comparator at high volume. - Designed Resistor-ladder DAC meeting INL, DNL, kick-back & settling time spec. - Designed Digital delay locked loop (DLL) for TX slew-rate compensation using Delay buffer chain with fine & coarse delay adjustment. - Designed Rx-CTLE biasing circuit with <15mV offset, <20ns t-settling & >45 PM & loop-gain of 30+dB. - Ability to conduct detailed layout review, propose complex floorplans, suggest layout improvements for Average/Peak IR drop, Matching, Sheilding & parasitics. - Create testbenches in Analog design env for Transient, AC/DC, Stability analysis, Monte-carlo analysis, EOS & Aging. - Ensure high-volume IC Performance/Reliability requirements using Monte-carlo, Totem RV for EM/IR/Self-heating etc., EOS, Aging & ESD requirements. - Meet & sign-off timing paths by reviewing Primetime reports. - Wrote Verilog-A model of FSM for mixed-signal sims & post-process data using Excel/MATLAB/Python. - Wrote BMODs for x-injections, exposure to RTL design environment, provide assertions for verification. Tools: Cadence Virtuoso ADE, Virtuoso Layout-XL, Totem RV, Cadence Voltus RV, ERC, Synopsys PrimeTime, Reliability verification, Conformal LEC, Verdi. 1.5 years of experience in Ethernet SERDES IP functionality on server platforms @ Intel (2017-2018) - Validate Ethernet functionality on server platforms. - Debugging involved analysis of Ethernet using IEEE 802.3 spec, SI, PI, schematic design, Firmware, link-partner establishment. - Expertise with VNA, Time domain oscilloscope, Protocol analyzers & BER testing. 2 yrs as Embedded system designer in Tismo Tech Bangalore, India (2013-15) - Design of Industrial measurement equipment. - Design involved Signal conditioning, Sensor interfacing, Amplifiers, DC/DC converters, Power delivery network, Part selections etc, Board bring up & maintaining BOM, soldering etc. M.S in Analog/Microwave design @ Portland State University, Oregon (2015-17) Intel

• What industry does Suraj Kulkarni currently work in?

  Suraj Kulkarni currently works in the
  Intel

• What is Suraj Kulkarni's area of expertise?

  Suraj Kulkarni specializes in
  10 yrs of Electronics Industry experience in varied roles from Mixed-Signal IC design, Embedded system design, server platform SERDES (Ethernet) validation 6 yrs of experience in Mixed signal IC design for (DDR) Memory IP @ Intel Folsom (2019-Current) - With main focus on quality & timely delivery of the projects while introducing innovation to solve problems & ensure open communication. - Conducted detailed study of scalable Combo DDR5/LPDDR5 Tx Analog-Front-End architectures for Power-Perf-Area-Reliability - Delivered DDR Tx-AFE Resistance-compensation scheme with <5% tolerance using switched-capacitor comparator at high volume. - Designed Resistor-ladder DAC meeting INL, DNL, kick-back & settling time spec. - Designed Digital delay locked loop (DLL) for TX slew-rate compensation using Delay buffer chain with fine & coarse delay adjustment. - Designed Rx-CTLE biasing circuit with <15mV offset, <20ns t-settling & >45 PM & loop-gain of 30+dB. - Ability to conduct detailed layout review, propose complex floorplans, suggest layout improvements for Average/Peak IR drop, Matching, Sheilding & parasitics. - Create testbenches in Analog design env for Transient, AC/DC, Stability analysis, Monte-carlo analysis, EOS & Aging. - Ensure high-volume IC Performance/Reliability requirements using Monte-carlo, Totem RV for EM/IR/Self-heating etc., EOS, Aging & ESD requirements. - Meet & sign-off timing paths by reviewing Primetime reports. - Wrote Verilog-A model of FSM for mixed-signal sims & post-process data using Excel/MATLAB/Python. - Wrote BMODs for x-injections, exposure to RTL design environment, provide assertions for verification. Tools: Cadence Virtuoso ADE, Virtuoso Layout-XL, Totem RV, Cadence Voltus RV, ERC, Synopsys PrimeTime, Reliability verification, Conformal LEC, Verdi. 1.5 years of experience in Ethernet SERDES IP functionality on server platforms @ Intel (2017-2018) - Validate Ethernet functionality on server platforms. - Debugging involved analysis of Ethernet using IEEE 802.3 spec, SI, PI, schematic design, Firmware, link-partner establishment. - Expertise with VNA, Time domain oscilloscope, Protocol analyzers & BER testing. 2 yrs as Embedded system designer in Tismo Tech Bangalore, India (2013-15) - Design of Industrial measurement equipment. - Design involved Signal conditioning, Sensor interfacing, Amplifiers, DC/DC converters, Power delivery network, Part selections etc, Board bring up & maintaining BOM, soldering etc. M.S in Analog/Microwave design @ Portland State University, Oregon (2015-17)

• Which languages does Suraj Kulkarni speak? 

  Suraj Kulkarni speaks the following languages:
  No languages available.

• Which industries has Suraj Kulkarni previously worked in?   

  Suraj Kulkarni has prior experience in the following industries:
  Intel , Intel , Intel , Portland State University , Portland State University , Tismo Technology Solutions

• What is Suraj Kulkarni’s work experience?  

  Suraj Kulkarni has the following professional experience:
  Intel , Intel , Intel , Intel , Portland State University , Portland State University , Tismo Technology Solutions .

• How can I find Suraj Kulkarni on LinkedIn?  

  You can view Suraj Kulkarni’s
  LinkedIn profile at LinkedIn URL.

• What are Suraj Kulkarni’s work email addresses?  

  Suraj Kulkarni’s work email addresses are
  [email protected] .

• What company does Suraj Kulkarni work for?  

  Suraj Kulkarni works at
  Intel