Vaibhav Pathak
Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, Universal... | San Francisco, California, United States
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Vaibhav Pathak’s Emails va****@ya****.co
Vaibhav Pathak’s Phone Numbers No phone number available.
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Vaibhav Pathak’s Location San Francisco, California, United States
Vaibhav Pathak’s Expertise Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, Universal Verification Methodology (UVM), SystemVerilog, VHDL and scripting languages. Strong engineering professional with a Master of Science (M.S.) focused in VLSI from University of Southern California.
Vaibhav Pathak’s Current Industry Tesla
Vaibhav
Pathak’s Prior Industry
Imagination Technologies
|
Altera
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Intel
|
Tesla
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Work Experience
Tesla
Senior Hardware Engineer
Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
SoC Design Engineer
Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Altera
Design Engineer 2
Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Altera
IC Front End Design Engineer Intern
Sun Feb 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Imagination Technologies
Graduate Hardware Engineer
Wed Jun 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Vaibhav Pathak Email Addresses
FAQ About Vaibhav Pathak
-
Vaibhav Pathak is located at
San Francisco, California, United States -
Vaibhav Pathak is a
Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, Universal Verification Methodology (UVM), SystemVerilog, VHDL and scripting languages. Strong engineering professional with a Master of Science (M.S.) focused in VLSI from University of Southern California. Tesla -
Vaibhav Pathak currently works in the
Tesla -
Vaibhav Pathak specializes in
Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, Universal Verification Methodology (UVM), SystemVerilog, VHDL and scripting languages. Strong engineering professional with a Master of Science (M.S.) focused in VLSI from University of Southern California. -
Vaibhav Pathak speaks the following languages:
No languages available. -
Vaibhav Pathak has prior experience in the following industries:
Intel , Altera , Altera , Imagination Technologies -
Vaibhav Pathak has the following professional experience:
Tesla , Intel , Altera , Altera , Imagination Technologies . -
You can view Vaibhav Pathak’s
LinkedIn profile at LinkedIn URL. -
Vaibhav Pathak’s work email addresses are
[email protected] . -
Vaibhav Pathak works at
Tesla
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