
Wenwei Zha
- 10+ years’ experience in ASIC/FPGA design and EDA tool/flow automation. - 4-year experience as a Graduate Research Assistant... | San Diego, California, United States
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Wenwei Zha’s Emails w.****@ap****.com
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Wenwei Zha’s Location San Diego, California, United States
Wenwei Zha’s Expertise - 10+ years’ experience in ASIC/FPGA design and EDA tool/flow automation. - 4-year experience as a Graduate Research Assistant in FPGA and Reconfigurable Computing - Familiar with Xilinx FPGAs and its tool suite and capable of developing dedicated FPGA tools of packer, mapper, placer, and router for reconfigurable computing, especially in embedded environment - Expertise in applying PathFinder and A* algorithm for FPGA routing - Hands on experience in programming with Verilog, VHDL, C/C++, SQL, Java - 1.5-year work experience as an ASIC Design Engineer participated in projects with real products like DVD processor, HDMI Scaler and Digital Media Player proficient in using Synopsys and other tools for ASIC Design development and verification fluent in using Perl/Unix Shell scripts and C program to generate, verify and convert test patters for ATE - Strong background in Electrical and Computer Engineering through comprehensive course study - VLSI, Digital Logic, Computer Architecture, Fault-tolerant System, Digital Image Processing, Signal Integrity, Digital and Analog Electronics, Power System, Power Electronics, Assembly Language, Mathematical Modeling with MATLAB - Solid knowledge in both hardware and software
Wenwei Zha’s Current Industry Apple
Wenwei
Zha’s Prior Industry
Missouri S And T
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Ess Technology
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Virginia Tech
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Qualcomm
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Apple
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Work Experience

Apple
CAD Engineer
Sun May 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Qualcomm
Staff Hardware Engineer
Wed Nov 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Qualcomm
Senior Hardware Engineer
Sat Mar 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Nov 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Qualcomm
Interim Intern
Wed May 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Virginia Tech
PhD
Tue Jan 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Feb 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Ess Technology
ASIC Design Engineer
Thu Jun 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Dec 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)
Missouri S And T
Graduate Research Assistant
Thu Jan 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)