
Xiaojun Zeng
Have strong ASIC design background including digital, and also mixed signal design, and have five-year ASIC design experience... | Shanghai, Shanghai, China
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Xiaojun Zeng’s Emails xi****@o2****.com
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Xiaojun Zeng’s Location Shanghai, Shanghai, China
Xiaojun Zeng’s Expertise Have strong ASIC design background including digital, and also mixed signal design, and have five-year ASIC design experience in Germany. Have a good grasp of Verilog & VHDL RTL coding and optimization know-how, as well as ASIC design flow including from product specification definition, system architecture design, building block partitioning & optimization, RTL coding, DC synthesis, DFT, ATPG/function test vector, pre/post-layout simulation, STA, FPGA verification to tape-out and engineering sample test. Have multiple years experience in team and project management, including team build-up, schedule management, task assignment, resource coordination, design review, and bring project to finish. Have good team work spirit, good understanding ability, independent work ability and good communication skills. Tel: 13601968857 Email: [email protected]
Xiaojun Zeng’s Current Industry 凹凸科技
Xiaojun
Zeng’s Prior Industry
凹凸科技
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Work Experience

凹凸科技
Director Of Digital Ic Design
Fri Apr 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Present