
Yong Liu
INDUSTRIAL ENGINEERING AND TECHNOLOGY DEVELOPMENT (1998-Present): FEOL/BEOL Semiconductor Process, Integration and Device R&D & Engineering for RF/digital CMOS, NOR/NAND... | Los Angeles Metropolitan Area, Los Angeles Metropolitan Area, United States
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Yong Liu’s Location Los Angeles Metropolitan Area, Los Angeles Metropolitan Area, United States
Yong Liu’s Expertise INDUSTRIAL ENGINEERING AND TECHNOLOGY DEVELOPMENT (1998-Present): FEOL/BEOL Semiconductor Process, Integration and Device R&D & Engineering for RF/digital CMOS, NOR/NAND flash memory cells, Si and Ge photonics (VOA, PIN/APD photo-detectors etc), GaN/InGaN, AlGaInP/GaAs MQW micro LED imager. Advanced e-test/yield analysis for semiconductor IC HVM. Device Characterization. Team Leadership and Management, Technology Development Program Management, Engineering and R&D Laboratory Management. __________________________________________ SCIENTIFIC RESEARCH AREAS (Before 1998): Laser Spectroscopy (M.S. Degree). Laser Uranium Isotope Separation via CRISLA method (University Faculty). Chemical Reaction Dynamics on Silicon, Plasma Etch Chemistry of Silicon, Semiconductor Surface Science (Ph.D Degree). Electron-Molecule and Ion-Molecule Reactions (Research Fellow). Atom-Resolved Scanning Tunneling Microscopy of Si(111), Si(100) and GaAs(100)-2X4 Surfaces (Staff Research Scientist, UC San Diego). __________________________________________ SELECTED PUBLICATIONS: 1. Semiconductor Thermal Processing: http://www.electrochem.org/dl/ma/203/pdfs/0884.pdf 2. Device Physics & Characterization: https://iopscience.iop.org/article/10.1149/1.3204404 3. Atom-Resolved Silicon Surface Science: http://www.sciencemag.org/cgi/content/abstract/276/5319/1681 4. Atom-Resolved GaAs Surface Science: http://focus.aps.org/story/v2/st3 https://journals.aps.org/prl/abstract/10.1103/PhysRevLett.81.413 Expertise: [1] Si, Ge, GaN/InGaN, GaAs, AlGaInP, RTP, thin-film, diffusion, PECVD, PVD, plasma/RIE etch, RIE, fusion bonding, laser anneal, FEOL, MOSFET, NOR/NAND flash, e-Test, ATE, SPC. [2] UHV, TPD, STM, AES, LEED, XRF, SIMS, XPS/ESCA, TEM, SEM, EDS, FTIR & Raman spectroscopy, 4-point probe, spectroscopic ellipsometry, SPV, Quantox (COCOS). [3] Mass spectrometry QMS, Ion-trap TOF MS, Ion mobility spectrometry, Ion-molecule reactions, Electron attachment, Laser spectroscopy, Laser chemistry, Laser uranium isotope separation. [4] JMP, DataPower, C++, MatLab, Visual Basic, FORTRAN, MS ACCESS, AutoCAD, Numerical Modeling.
Yong Liu’s Current Industry Intel
Yong
Liu’s Prior Industry
Syagen Technologies
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Axcelis Technologies
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Intel
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Innovative Silicon
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Kotura
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Rec Silicon
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Towerjazz Semiconductor
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Ostendo Technologies
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Helm Scientific Laboratory
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Work Experience

Intel
Process Integration Development
Sat Jun 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Helm Scientific Laboratory
Founder & Chief Scientist
Wed Feb 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed May 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time)
Ostendo Technologies
Director, Semiconductor Development & Engineering
Fri Jul 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Towerjazz Semiconductor
Process and Device Research & Development
Mon Dec 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jul 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Rec Silicon
R&D Manager
Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Sep 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Kotura
Principal Engineer
Thu Apr 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Innovative Silicon
Principal Member of Technical Staff
Sun Jun 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Apr 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
NAND JDP Device Lab Manager, Senior Device/Staff Process Technology Development Engineer
Sat May 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jun 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)
Axcelis Technologies
Principal Scientist & SELOX Project Manager
Thu Jun 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Oct 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time)
Syagen Technologies
Staff Scientist
Thu Jan 01 1998 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)