
Zayyan Siddiqui
# 12+ years of experience in Memory Layout Design (DRAM/SRAM/RF/ROM) with single/dual port memory. ... | Bengaluru, Karnataka, India
*50 free lookup(s) per month.
No credit card required.
Zayyan Siddiqui’s Emails za****@sy****.com
Zayyan Siddiqui’s Phone Numbers No phone number available.
Social Media
Zayyan Siddiqui’s Location Bengaluru, Karnataka, India
Zayyan Siddiqui’s Expertise # 12+ years of experience in Memory Layout Design (DRAM/SRAM/RF/ROM) with single/dual port memory. # Working experience on Finfet & Planner both. # Technology nodes- 7nm,10nm, 14nm, 22nm, 28nm, 32nm. # Worked for different foundries like INTEL, TSMC, GF, SAMSUNG. # Good exposure to Electromigration & IR drop.
Zayyan Siddiqui’s Current Industry Intel
Zayyan
Siddiqui’s Prior Industry
Stmicroelectronics
|
Synopsys
|
Alten Calsoft Labs
|
Intel
Not the Zayyan Siddiqui you were looking for?
Find accurate emails & phone numbers for over 700M professionals.
Work Experience

Intel
Soc Design Engineer
Fri Jul 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Alten Calsoft Labs
Staff Engineer
Mon Apr 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jul 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Alten Calsoft Labs
Sr. Layout Design Engineer
Mon Aug 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Mar 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Synopsys
Memory Layout Design Engineer
Sun May 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Feb 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Stmicroelectronics
Layout Design Engineer
Mon Mar 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun May 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)