Zheng Xiao
Achievement: Delivered complete test and characterization solutions for a wide range of... | San Francisco, California, United States
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Zheng Xiao’s Location San Francisco, California, United States
Zheng Xiao’s Expertise Achievement: Delivered complete test and characterization solutions for a wide range of mobile SoC, standard, ASSP, ASIC and test-vehicle devices with integrated mixed-signal circuits, high-speed interfaces, and power management functions. Innovation: Devised and implemented novel solutions to meet test performance and cost challenges. Theoretical and Technical Background: In-depth understanding and broad knowledge of mixed-signal, analog, power management, and high-speed digital signal integrity test and measurement methodologies, theories and their applications. Skilled in analog and digital circuit design, analysis, debug for ATE test. ATE, Bench Equipment: Proficient on Teradyne UltraFLEX/J973, Credence Logic/Duo/Quartet/ASL1000 (RFx), Advantest T6600s. Hands-on experience using oscilloscopes, spectrum analyzers, network analyzers, signal generators, curve tracers, signal integrity analyzers. Test Fixtures, Programs: Experienced in load-board design, working knowledge of signal and power integrity issues for high performance, high speed, and/or high power PCB layout. Fluent in various programming and scripting languages.
Zheng Xiao’s Current Industry Tesla
Zheng
Xiao’s Prior Industry
Lsi Logic
|
Amd
|
Integration Assoiciates
|
Lsi
|
Apple
|
Micron Technology
|
Tesla
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Work Experience
Tesla
Test Engineer
Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Micron Technology
Test Engineer
Thu Nov 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Apple
Test Engineer
Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Nov 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Lsi
Test Engineer
Tue Jun 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Integration Assoiciates
Test Engineer
Wed Oct 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jun 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Amd
Test Engineer
Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Oct 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time)
Lsi Logic
Test Engineer
Mon Jun 01 1998 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Feb 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Zheng Xiao Email Addresses
FAQ About Zheng Xiao
-
Zheng Xiao is located at
San Francisco, California, United States -
Zheng Xiao is a
Achievement: Delivered complete test and characterization solutions for a wide range of mobile SoC, standard, ASSP, ASIC and test-vehicle devices with integrated mixed-signal circuits, high-speed interfaces, and power management functions. Innovation: Devised and implemented novel solutions to meet test performance and cost challenges. Theoretical and Technical Background: In-depth understanding and broad knowledge of mixed-signal, analog, power management, and high-speed digital signal integrity test and measurement methodologies, theories and their applications. Skilled in analog and digital circuit design, analysis, debug for ATE test. ATE, Bench Equipment: Proficient on Teradyne UltraFLEX/J973, Credence Logic/Duo/Quartet/ASL1000 (RFx), Advantest T6600s. Hands-on experience using oscilloscopes, spectrum analyzers, network analyzers, signal generators, curve tracers, signal integrity analyzers. Test Fixtures, Programs: Experienced in load-board design, working knowledge of signal and power integrity issues for high performance, high speed, and/or high power PCB layout. Fluent in various programming and scripting languages. Tesla -
Zheng Xiao currently works in the
Tesla -
Zheng Xiao specializes in
Achievement: Delivered complete test and characterization solutions for a wide range of mobile SoC, standard, ASSP, ASIC and test-vehicle devices with integrated mixed-signal circuits, high-speed interfaces, and power management functions. Innovation: Devised and implemented novel solutions to meet test performance and cost challenges. Theoretical and Technical Background: In-depth understanding and broad knowledge of mixed-signal, analog, power management, and high-speed digital signal integrity test and measurement methodologies, theories and their applications. Skilled in analog and digital circuit design, analysis, debug for ATE test. ATE, Bench Equipment: Proficient on Teradyne UltraFLEX/J973, Credence Logic/Duo/Quartet/ASL1000 (RFx), Advantest T6600s. Hands-on experience using oscilloscopes, spectrum analyzers, network analyzers, signal generators, curve tracers, signal integrity analyzers. Test Fixtures, Programs: Experienced in load-board design, working knowledge of signal and power integrity issues for high performance, high speed, and/or high power PCB layout. Fluent in various programming and scripting languages. -
Zheng Xiao speaks the following languages:
No languages available. -
Zheng Xiao has prior experience in the following industries:
Micron Technology , Apple , Lsi , Integration Assoiciates , Amd , Lsi Logic -
Zheng Xiao has the following professional experience:
Tesla , Micron Technology , Apple , Lsi , Integration Assoiciates , Amd , Lsi Logic . -
You can view Zheng Xiao’s
LinkedIn profile at LinkedIn URL. -
Zheng Xiao’s work email addresses are
[email protected] . -
Zheng Xiao works at
Tesla
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